参数资料
型号: DS2704G+T&R
厂商: Maxim Integrated Products
文件页数: 10/18页
文件大小: 0K
描述: IC EEPROM 1.25KBIT 6TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 10,000
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1.25K(32B x 5 页)
接口: 1 线 串行
电源电压: 2.5 V ~ 5.5 V
工作温度: -30°C ~ 85°C
封装/外壳: 6-WDFN 裸露焊盘
供应商设备封装: 6-TDFN 裸露焊盘(3x3)
包装: 带卷 (TR)
DS2704: 1280-Bit EEPROM with SHA-1 Authentication
Table 6. EEPROM Memory and Status Function Commands
COMMAND
Read Memory
Read Data/Generate CRC
Read All
Read Status
Write Status
Write Scratchpad
Read Scratchpad
Copy Scratchpad
HEX
F0
C3
65
AA
55
6C
69
48
FUNCTION
Read data from the lower 1024 bits of the 1280-bit EEPROM
Memory data field. Generates a CRC value if read continues to end
of the 4 th page.
Read data from lower 4 pages of the EEPROM Memory data field.
Generates a CRC value of the data read from each page if read
continues to the end of page.
Read data from all 5 pages of the EEPROM Memory data field.
Read data from the 8-byte EEPROM Status data field.
Write the Page Protection bits in the EEPROM Status data field.
Write up to 8 bytes of data to the Scratchpad register.
Read up to 8 bytes of the Scratchpad register data.
Programs the Scratchpad data to EEPROM DATA FIELD at the
target address TA2:TA1.
Note : The Read Data, Read Data/Generate CRC and Read Status commands filter the target address (TA2:TA1)
value with a 007Fh AND mask that limits the addressable size of the EEPROM Data Field and EEPROM Status
Field to 1024 bits. Target address values equal to or greater than 0080h (128 decimal) return data from the lower
128 bytes of the respective data field. It is also important to note that the filter is applied prior to calculation of the
CRC, so that target address values that are multiples of 128 return the same CRC. The CRC values should be
considered correct only for TA2:TA1 = 0000h to 007Fh.
1-Wire BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. A multidrop bus is a 1-Wire bus
with multiple slaves, while a single-drop bus has only one slave device. In all instances, the DS2704 is a slave
device. The bus master is typically a microprocessor in the host system. The discussion of this bus system consists
of five topics: 64-bit Net Address, CRC generation, hardware configuration, transaction sequence, and 1-Wire
signaling.
64-BIT NET ADDRESS (ROM ID)
Each DS2704 has a unique, factory-programmed 1-Wire Net Address that is 64 bits in length. The term Net
Address is synonymous with the ROM ID or ROM Code terms used in the DS2502 and other Dallas 1-Wire
documentation. The first eight bits of the Net Address are the 1-Wire family code (09h). The next 48 bits are a
unique serial number. The last eight bits are a cyclic redundancy check (CRC) of the first 56 bits (see Figure 2).
The 64-bit Net Address and the 1-Wire I/O circuitry built into the device enable the DS2704 to communicate
through the 1-Wire protocol detailed in this data sheet.
Figure 2. 1-Wire Net Address Format
8-BIT CRC
MSb
48-BIT SERIAL NUMBER
10 of 18
8-BIT FAMILY
CODE (09H)
LSb
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