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参数资料
| 型号： | DS2704G+T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1.25KBIT 6TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 10,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1.25K（32B x 5 页） |
| 接口： | 1 线 串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -30°C ~ 85°C |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 供应商设备封装： | 6-TDFN 裸露焊盘（3x3） |
| 包装： | 带卷 (TR) |
DS2704: 1280-Bit EEPROM with SHA-1 Authentication
I/O SIGNALING
The 1-Wire bus requires strict signaling protocols to ensure data integrity. The four protocols used by the DS2704
are as follows: the initialization sequence (reset pulse followed by presence pulse), write 0, write 1, and read data.
The bus master initiates all these types of signaling except the presence pulse.
The initialization sequence required to begin any communication with the DS2704 is shown in Figure 5. A presence
pulse following a reset pulse indicates that the DS2704 is ready to accept a Net Address command. The bus
master transmits (Tx) a reset pulse for t RSTL . The bus master then releases the line and goes into receive mode
(Rx). The 1-Wire bus line is then pulled high by the pullup resistor. After detecting the rising edge on the DQ pin,
the DS2704 waits for t PDH and then transmits the presence pulse for t PDL .
Figure 5. 1-Wire Initialization Sequence
t RSTL
t PDH
t PDL
t RSTH
PACK+
DQ
PACK-
LINE TYPE LEGEND:
BUS MASTER ACTIVE LOW
BOTH BUS MASTER AND
DS2704 ACTIVE LOW
RESISTOR PULLUP
DS2704 ACTIVE LOW
WRITE-TIME SLOTS
A write-time slot is initiated when the bus master pulls the 1-Wire bus from a logic-high (inactive) level to a logic-low
level. There are two types of write-time slots: write 1 and write 0. All write-time slots must be t SLOT in duration with
a 1 μ s minimum recovery time, t REC , between cycles. The DS2704 samples the 1-Wire bus line between t LOW1_MAX
and t LOW0_MIN after the line falls. If the line is high when sampled, a write 1 occurs. If the line is low when sampled, a
write 0 occurs. The sample window is illustrated in Figure 6. 1-Wire Write- and Read-Time Slots. For the bus
master to generate a write 1 time slot, the bus line must be pulled low and then released, allowing the line to be
pulled high less than t RDV after the start of the write time slot. For the host to generate a write 0 time slot, the bus
line must be pulled low and held low for the duration of the write-time slot.
READ-TIME SLOTS
A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level.
The bus master must keep the bus line low for at least 1 μ s and then release it to allow the DS2704 to present valid
data. The bus master can then sample the data t RDV from the start of the read-time slot. By the end of the read-
time slot, the DS2704 releases the bus line and allows it to be pulled high by the external pullup resistor. All read-
time slots must be t SLOT in duration with a 1 μ s minimum recovery time, t REC , between cycles. See Figure 6 and the
timing specifications in the Electrical Characteristics table for more information.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2704K | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS2704REVKIT+ | 制造商:Maxim Integrated Products 功能描述:RMS POWER DETECTOR - Boxed Product (Development Kits) |
| DS2704RG+ | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS2704RG+T&R | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS2704R-K | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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