
DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
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Table 4-C. Receiver Pin Descriptions
NAME
I/O
FUNCTION
RXPn,
RXNn
I
Receiver Analog Inputs. These differential AMI inputs are coupled to the inbound 75
Ω coaxial cable
RCLKn
O3
Receiver Clock. The recovered clock is output on the RCLK pin. Recovered data is output on the
RPOS/RDAT and RNEG/RLCV pins on the falling edge of RCLK (RCINV = 0) or the rising edge of
RCLK (RCINV = 1). During a loss of signal (
RLOS = 0), the RCLK output signal is derived from the
LIU’s master clock.
RPOSn/
RDATn
O3
Receiver Positive AMI/Receiver Data. When the receiver is configured to have a bipolar interface
(RBIN = 0), RPOS pulses high for each positive AMI pulse received. When the receiver is
configured to have a binary interface (RBIN = 1), RDAT outputs decoded binary data. RPOS/RDAT
is updated either on the falling edge of RCLK (RCINV = 0) or the rising edge of RCLK (RCINV = 1).
RNEGn/
RLCVn
O3
Receiver Negative AMI/Line-Code Violation. When the receiver is configured to have a bipolar
interface (RBIN = 0), RNEG pulses high for each negative AMI pulse received. When the receiver is
configured to have a binary interface (RBIN = 1), RLCV pulses high to flag code violations. See
Section
6 for further details on code violations. RNEG/RLCV is updated either on the falling edge of
RCLK (RCINV = 0) or the rising edge of RCLK (RCINV = 1).
RTSn
I
Receiver Tri-State Enable (Active Low).
RTS tri-states the RPOS/RDAT, RNEG/RLCV, and RCLK
receiver outputs. This feature supports applications requiring LIU redundancy. Receiver outputs
from multiple LIUs can be wire-ORed together, eliminating the need for external switches or muxes.
The receiver continues to operate internally when
RTS is low.
0 = tri-state the receiver outputs
1 = enable the receiver outputs
RLOSn
O
Receiver Loss of Signal (Active Low, Open Drain).
RLOS is asserted upon detection of 175
±75
consecutive zeros in the receive data stream.
RLOS is deasserted when there are no excessive
zero occurrences over a span of 175
±75 clock periods. An excessive zero occurrence is defined as
three or more consecutive zeros in the DS3 and STS-1 modes or four or more zeros in the E3
mode. See Section
6 for additional details.
RMONn
I
Receive Monitor-Preamp Enable. RMON determines whether or not the receiver’s preamp is
enabled to provide flat gain to the incoming signal before the AGC/equalizer block processes it. This
feature should be enabled when the device is being used to monitor signals that have been
resistively attenuated by a monitor jack.
0 = disable the monitor preamp
1 = enable the monitor preamp
RJAn
I
Receiver Jitter Attenuator Enable
0 = remove jitter attenuator from the receiver path
1 = insert jitter attenuator into the receiver path
(Note that TJA = 1 takes precedence over RJA = 1.)