参数资料
型号: DS33Z44+
厂商: Maxim Integrated Products
文件页数: 59/59页
文件大小: 0K
描述: IC MAPPER ETHERNET 256CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 40
应用: 数据传输
接口: 串行
电源电压: 1.8V,2.5V,3.3V
封装/外壳: 256-LBGA,CSBGA
供应商设备封装: 256-CSBGA(17x17)
包装: 托盘
安装类型: 表面贴装
DS33Z44DK
9 of 59
The DS3174 quad T3/E3 PC board floorplan is shown in Figure 2. Jumpers JP16, JP17, JP18, and JP19 are 3-pin
jumpers used to tri-state/enable T3/E3 ports. With the board oriented as shown in Figure 2, the top 2 pins of each
jumper would be connected to enable T3/E3 traffic.
A 2-pin jumper, JP24, has been added to allow loopback. When installed, the board is in loopback at the CPLD; all
traffic sent by the DS33Z44 is then sent back to the Z44. Traffic sent by the DS3174 is ignored in CPLD loopback
mode.
The quad T3/E3 board is intended to be connected to the DS33Z11 or DS33Z44 motherboards. The quad T3/E3
board can be used with the quad T1/E1 board. When used in this manner, the quad T1/E1 board is stacked
underneath the quad T3/E3 board. Jumpers on the T3/E3 board are then used to tri-state or enable individual ports
on either board.
Figure 3 shows the DS21458 quad T1/E1 PC board floorplan. The current configuration is to populate oscillators
for MCLK1 with a 2.048MHz oscillator. Testpoints for port 3 and port 4 are provided on the WAN card, and
testpoints for ports 1 and 2 are provided on the motherboard.
The quad T1/E1 board can be used with the quad T3/E3 board. When used in this manner, the quad T1/E1 board
is stacked underneath the quad T3/E3 board. Jumpers on the T3/E3 board are then used to tri-state or enable
individual ports on either board.
Figure 3. DS21458 Resource Card Floorplan
PORT 2
PORT 4
PORT 1
PORT 3
DS21458
QUAD-PORT
T1/E1
TRANSCEIVER
140
PIN
CONNECTORS
TEST
POINTS
FPGA
OSC
MCLK1, 2
JTA
G
QUAD
-PO
R
TR
J45
QUAD
TRANSFORMER
RLOS LEDS
INT LED
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