参数资料
型号: DSP56F807VF80
厂商: Freescale Semiconductor
文件页数: 5/60页
文件大小: 0K
描述: IC DSP 80MHZ 60K FLASH 160-BGA
标准包装: 126
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: CAN,EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 136KB(68K x 16)
程序存储器类型: 闪存
RAM 容量: 6K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 16x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 160-BGA
包装: 托盘
GPIO Signals
56F807 Technical Data Technical Data, Rev. 16
Freescale Semiconductor
13
2.6 GPIO Signals
1
RSTO
Output
Reset Output—This output reflects the internal reset state of the
chip.
1
RESET
Input
(Schmitt)
Input
Reset—This input is a direct hardware reset on the processor. When
RESET is asserted low, the device is initialized and placed in the
Reset state. A Schmitt trigger input is used for noise immunity. When
the RESET pin is deasserted, the initial chip operating mode is
latched from the EXTBOOT pin. The internal reset signal will be
deasserted synchronous with the internal clocks, after a fixed number
of internal clocks.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and it is
necessary not to reset the OnCE/JTAG module. In this case, assert
RESET, but do not assert TRST.
1
EXTBOOT
Input
(Schmitt)
Input
External Boot—This input is tied to VDD to force device to boot from
off-chip memory. Otherwise, it is tied to VSS.
Table 2-10 Dedicated General Purpose Input/Output (GPIO) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
8
GPIOB0-
GPIOB7
Input
or
Output
Input
Port B GPIO—These eight pins are dedicated General Purpose I/O
(GPIO) pins that can individually be programmed as input or output
pins.
After reset, the default state is GPIO input.
6
GPIOD0-
GPIOD5
Input
or
Output
Input
Port D GPIO—These six pins are dedicated GPIO pins that can
individually be programmed as an input or output pins.
After reset, the default state is GPIO input.
Table 2-9 Interrupt and Program Control Signals (Continued)
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
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