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参数资料
| 型号： | DSPAUDIOEVMMB1E |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 15/60页 |
| 文件大小： | 0K |
| 描述： | BOARD MOTHER DSP563XX |
| 标准包装： | 1 |
| 系列： | Symphony™ |
| 类型： | DSP |
| 适用于相关产品： | DSP563XX |
| 所含物品： | 主板 |
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Memory
Table 3-2. Mode Selection for 56364
MODD
0
0
0
0
1
1
1
1
MODC
X
X
X
X
X
X
X
X
MODB
0
0
1
1
0
0
1
1
MODA
0
1
0
1
0
1
0
1
Mode
Jump to PROM starting address
Bootstrap from byte-wide memory
Reserved
Reserved for Burn-in testing
Reserved
Bootstrap from SHI (slave SPI mode)
Bootstrap from SHI (slave I2C mode, clock freeze enabled)
Bootstrap from SHI (slave I2C mode, clock freeze disabled
3.3
Memory
The daughterboard includes three 128Kx8 SRAM (one 128Kx8 SRAM for the 56364 daughterboard). There is also a 512Kx8 FLASH device
resident on the board. From factory the FLASH is programmed with an audio passthru code to allow simple verification of initial board
operations. See Section 1.8, Running the Passthru Code for an explanation of running the passthru code.
3.4
JP11 - Clock Selection
Jumper bank JP11 allows for the following clocking modes:
OSC – Clock DSP from canned oscillator at U7 (not Populated)
XTAL – Clock DSP from 24.576MHz crystal at X1 (default mode)
EXT – Clock DSP from motherboard 24.576MHz clock source
Only one of the JP11 options should be populated at the same time.
3.5
Daughterboard Audio I / O and Clock Control Header
Table 3-3. Daughterboard Audio I / O and Clock Control Header
*
*
A
*
*
B
*
*
C
*
*
D
*
*
E
*
*
F
*
*
G
*
*
H
*
*
I
*
*
J
*
*
K
*
*
L
*
*
M
*
*
N
*
*
O
*
*
P
*
*
Q
TI0
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
3.5.1
TIO0 – Timmer Port
This is connected directly to the TIO0 pin on the DSP.
3.5.2
JP1 - Synchronous/Asynchronous Clock Control
This jumper set controls whether or not the DSP is in synchronous or asynchronous mode. Position B allows the DSP GPIO (pin PB9) to
choose the mode. Position C forces the mode to be asynchronous, and no jumper forces synchronous mode. In synchronous mode FST is
connected to FSR, and SCKT is connected to SCKR on the ESAI port of the DSP.
DSPAUDIOEVM Users Guide, Rev. 2.4
This document contains information on a new product. Specifications and information herein are subject ot change without notice.
Freescale Semiconductor
9
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