参数资料
型号: DSPIC30F3014-20I/PT
厂商: Microchip Technology
文件页数: 69/153页
文件大小: 0K
描述: IC DSPIC MCU/DSP 24K 44TQFP
产品培训模块: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
标准包装: 160
系列: dsPIC™ 30F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 20 MIPS
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 30
程序存储器容量: 24KB(8K x 24)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 2.5 V ~ 5.5 V
数据转换器: A/D 13x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-TQFP
包装: 托盘
配用: XLT80PT3-ND - SOCKET TRAN ICE 80MQFP/TQFP
AC164305-ND - MODULE SKT FOR PM3 44TQFP
其它名称: DSPIC30F301420IPT
dsPIC30F3014/4013
DS70138G-page 22
2010 Microchip Technology Inc.
The SA and SB bits are modified each time data
passes through the adder/subtracter but can only be
cleared by the user. When set, they indicate that the
accumulator has overflowed its maximum range (bit 31
for 32-bit saturation or bit 39 for 40-bit saturation) and
will be saturated if saturation is enabled. When
saturation is not enabled, SA and SB default to bit 39
overflow and, thus, indicate that a catastrophic over-
flow has occurred. If the COVTE bit in the INTCON1
register is set, SA and SB bits generate an arithmetic
warning trap when saturation is disabled.
The overflow and saturation Status bits can optionally
be viewed in the STATUS register (SR) as the logical
OR of OA and OB (in bit OAB) and the logical OR of SA
and SB (in bit SAB). This allows programmers to check
one bit in the STATUS register to determine if either
accumulator has overflowed, or one bit to determine if
either accumulator has saturated. This would be useful
for complex number arithmetic which typically uses
both the accumulators.
The device supports three saturation and overflow
modes:
1.
Bit 39 Overflow and Saturation:
When bit 39 overflow and saturation occurs, the
saturation logic loads the maximally positive 9.31
(0x7FFFFFFFFF), or maximally negative 9.31
value (0x8000000000) into the target accumula-
tor. The SA or SB bit is set and remains set until
cleared by the user. This is referred to as ‘super
saturation’ and provides protection against erro-
neous data or unexpected algorithm problems
(e.g., gain calculations).
2.
Bit 31 Overflow and Saturation:
When bit 31 overflow and saturation occurs, the
saturation logic then loads the maximally posi-
tive 1.31 value (0x007FFFFFFF), or maximally
negative 1.31 value (0x0080000000) into the
target accumulator. The SA or SB bit is set and
remains set until cleared by the user. When this
Saturation mode is in effect, the guard bits are
not used, so the OA, OB or OAB bits are never
set.
3.
Bit 39 Catastrophic Overflow:
The bit 39 overflow Status bit from the adder is
used to set the SA or SB bit which remain set
until cleared by the user. No saturation operation
is performed and the accumulator is allowed to
overflow (destroying its sign). If the COVTE bit in
the INTCON1 register is set, a catastrophic
overflow can initiate a trap exception.
2.4.2.2
Accumulator ‘Write-Back’
The MAC class of instructions (with the exception of
MPY,
MPY.N,
ED
and EDAC) can optionally write a
rounded version of the high word (bits 31 through 16)
of the accumulator that is not targeted by the instruction
into data space memory. The write is performed across
the X bus into combined X and Y address space. The
following addressing modes are supported:
1.
W13, Register Direct:
The
rounded
contents
of
the
non-target
accumulator
are
written
into
W13
as
a
1.15 fraction.
2.
[W13]+=2, Register Indirect with Post-Increment:
The rounded contents of the non-target accumu-
lator are written into the address pointed to by
W13
as
a
1.15
fraction.
W13
is
then
incremented by 2 (for a word write).
2.4.2.3
Round Logic
The round logic is a combinational block which performs
a conventional (biased) or convergent (unbiased) round
function during an accumulator write (store). The Round
mode is determined by the state of the RND bit in the
CORCON register. It generates a 16-bit, 1.15 data value,
which is passed to the data space write saturation logic.
If rounding is not indicated by the instruction, a truncated
1.15 data value is stored and the least significant word
(lsw) is simply discarded.
Conventional rounding takes bit 15 of the accumulator,
zero-extends it and adds it to the ACCxH word (bits 16
through 31 of the accumulator). If the ACCxL word
(bits 0 through 15 of the accumulator) is between
0x8000 and 0xFFFF (0x8000 included), ACCxH is
incremented. If ACCxL is between 0x0000 and 0x7FFF,
ACCxH is left unchanged. A consequence of this algo-
rithm is that over a succession of random rounding
operations, the value tends to be biased slightly
positive.
Convergent (or unbiased) rounding operates in the
same manner as conventional rounding, except when
ACCxL equals 0x8000. If this is the case, the Least Sig-
nificant bit (LSb) (bit 16 of the accumulator) of ACCxH
is examined. If it is ‘1’, ACCxH is incremented. If it is ‘0’,
ACCxH is not modified. Assuming that bit 16 is
effectively random in nature, this scheme removes any
rounding bias that may accumulate.
The SAC and SAC.R instructions store either a trun-
cated (SAC) or rounded (SAC.R) version of the contents
of the target accumulator to data memory via the X bus
(subject to data saturation, see Section 2.4.2.4 “Data
Space Write Saturation”). Note that for the MAC class
of instructions, the accumulator write-back operation
functions in the same manner, addressing combined
MCU (X and Y) data space though the X bus. For this
class of instructions, the data is always subject to
rounding.
相关PDF资料
PDF描述
ATMEGA325V-8MI IC AVR MCU 32K 8MHZ 64-QFN
PIC16F74-I/P IC MCU FLASH 4KX14 A/D 40DIP
ATMEGA165-16AI IC AVR MCU 16K 16MHZ 64TQFP
ATMEGA165-16AU IC AVR MCU 16K 16MHZ 64TQFP
ATMEGA165V-8MU IC AVR MCU 16K 8MHZ 64-QFN
相关代理商/技术参数
参数描述
DSPIC30F3014-30I/ML 功能描述:数字信号处理器和控制器 - DSP, DSC General Purpose RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC30F3014-30I/P 功能描述:数字信号处理器和控制器 - DSP, DSC General Purpose RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC30F3014-30I/P 制造商:Microchip Technology Inc 功能描述:16- Bit Digital Signal Controller
DSPIC30F3014-30I/PT 功能描述:数字信号处理器和控制器 - DSP, DSC General Purpose RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC30F3014T-20E/ML 功能描述:数字信号处理器和控制器 - DSP, DSC 44LD 20MIPS 24 KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT