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参数资料
型号： DSPIC30F4012-20E/ML
厂商： Microchip Technology
文件页数： 14/66页
文件大小： 0K
描述： IC DSPIC MCU/DSP 48K 44QFN
产品培训模块： Asynchronous Stimulus
标准包装： 45
系列： dsPIC™ 30F
核心处理器： dsPIC
芯体尺寸： 16-位
速度： 20 MIPS
连通性： CAN，I²C，SPI，UART/USART
外围设备： 高级欠压探测/复位，电机控制 PWM，QEI，POR，PWM，WDT
输入/输出数： 20
程序存储器容量： 48KB（16K x 24）
程序存储器类型： 闪存
EEPROM 大小： 1K x 8
RAM 容量： 2K x 8
电压 - 电源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
数据转换器： A/D 6x10b
振荡器型： 内部
工作温度： -40°C ~ 125°C
封装/外壳： 44-VQFN 裸露焊盘
包装： 管件
配用： XLT44QFN4-ND - SOCKET TRANS ICE 28DIP TO 44QFN
其它名称： DSPIC30F401220EML
2010 Microchip Technology Inc.
DS70102K-page 21
dsPIC30F Flash Programming Specification
6.6
Configuration Information in the
Hexadecimal File
To allow portability of code, the programmer must read
the
Configuration
register
locations
from
the
hexadecimal file. If configuration information is not
present in the hexadecimal file, a simple warning
message should be issued by the programmer.
Similarly, while saving a hexadecimal file, all
configuration information must be included. An option
to not include the configuration information can be
provided.
Microchip Technology Inc. feels strongly that this
feature is important for the benefit of the end customer.
6.7
Unit ID
The dsPIC30F devices contain 32 instructions of Unit
ID. These are located at addresses 0x8005C0 through
0x8005FF. The Unit ID can be used for storing product
information
such
as
serial
numbers,
system
manufacturing dates, manufacturing lot numbers and
other such application-specific information.
A Bulk Erase does not erase the Unit ID locations.
Instead, erase all executive memory using steps 1-4 as
shown in Table 12-1, and program the Unit ID along
with the programming executive. Alternately, use a
Row Erase to erase the row containing the Unit ID
locations.
6.8
Checksum Computation
Checksums for the dsPIC30F are 16 bits in size. The
checksum is to total sum of the following:
Contents of code memory locations
Contents of Configuration registers
Table A-1 describes how to calculate the checksum for
each device. All memory locations are summed one
byte at a time, using only their native data size. More
specifically, Configuration and device ID registers are
summed by adding the lower two bytes of these
locations (the upper byte is ignored), while code
memory is summed by adding all three bytes of code
memory.
Note:
The
checksum
calculation
differs
depending on the code-protect setting.
Table A-1 describes how to compute the
checksum for an unprotected device and
a read-protected device. Regardless of
the code-protect setting, the Configuration
registers can always be read.
7.0
PROGRAMMER –
PROGRAMMING EXECUTIVE
COMMUNICATION
7.1
Communication Overview
The programmer and programming executive have a
master-slave relationship, where the programmer is
the master programming device and the programming
executive is the slave.
All communication is initiated by the programmer in the
form of a command. Only one command at a time can
be sent to the programming executive. In turn, the
programming executive only sends one response to
the programmer after receiving and processing a
command. The programming executive command set
is described in Section 8.0 “Programming Executive
Commands”. The response set is described in
Section 9.0 “Programming Executive Responses”.
7.2
Communication Interface and
Protocol
The Enhanced ICSP interface is a 2-wire SPI interface
implemented using the PGC and PGD pins. The PGC
pin is used as a clock input pin, and the clock source
must be provided by the programmer. The PGD pin is
used for sending command data to, and receiving
response data from, the programming executive. All
serial data is transmitted on the falling edge of PGC
and latched on the rising edge of PGC. All data
transmissions are sent Most Significant bit (MSb) first,
using 16-bit mode (see Figure 7-1).
FIGURE 7-1:
PROGRAMMING
EXECUTIVE SERIAL
TIMING
Since a 2-wire SPI interface is used, and data transmis-
sions are bidirectional, a simple protocol is used to
control the direction of PGD. When the programmer
completes a command transmission, it releases the
PGD line and allows the programming executive to
drive this line high. The programming executive keeps
the PGD line high to indicate that it is processing the
command.
After the programming executive has processed the
command, it brings PGD low for 15
μsec to indicate to
the programmer that the response is available to be
PGC
PGD
12
3
11
13
15 16
14
12
LSb
14 13 12 11
45
6
MSb
1
2
3
...
4
5
P2
P3
P1
P1a
P1b
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相关代理商/技术参数
参数描述
dsPIC30F4012-20I/ML 功能描述:数字信号处理器和控制器 - DSP, DSC 44LD 20MIPS 48 KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC30F4012-20I/SO 功能描述:数字信号处理器和控制器 - DSP, DSC 16 Bit MCU/DSP 28LD 20M 48KB FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC30F4012-20I/SP 功能描述:数字信号处理器和控制器 - DSP, DSC 16 Bit MCU/DSP 28LD 20M 48KB FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC30F4012-20I/SP 制造商:Microchip Technology Inc 功能描述:16BIT MCU-DSP 20MHZ 30F4012 SDIL
DSPIC30F4012-30I/ML 功能描述:数字信号处理器和控制器 - DSP, DSC Motor Control RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
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