- 您现在的位置：买卖IC网 > PDF目录295865 > E28F400BX-B60 (INTEL CORP) ACTUATOR, SWITCH, ROUND, MOMENTARY; Approval Bodies:BEAB, VDE, UL, CSA; Diameter, external:29mm; IP rating:65; Operations, mechanical No. of:1000000; Temp, op. max:85(degree C); Temp, op. min:-20(degree C) RoHS Compliant: Yes PDF资料下载
参数资料
| 型号： | E28F400BX-B60 |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | ACTUATOR, SWITCH, ROUND, MOMENTARY; Approval Bodies:BEAB, VDE, UL, CSA; Diameter, external:29mm; IP rating:65; Operations, mechanical No. of:1000000; Temp, op. max:85(degree C); Temp, op. min:-20(degree C) RoHS Compliant: Yes |
| 中文描述： | 256K X 16 FLASH 12V PROM, 60 ns, PDSO56 |
| 封装： | 20 X 14 MM, TSOP-56 |
| 文件页数： | 50/50页 |
| 文件大小： | 449K |
| 代理商： | E28F400BX-B60 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页当前第50页
28F400BX-TB 28F004BX-TB
15 28F400BX Pin Descriptions
Symbol
Type
Name and Function
A0–A17
I
ADDRESS INPUTS
for memory addresses Addresses are internally latched during a write
cycle
A9
I
ADDRESS INPUT
When A9 is at 12V the signature mode is accessed During this mode A0
decodes between the manufacturer and device ID’s When BYTE
is at a logic low only the
lower byte of the signatures are read DQ15 Ab1 is a don’t care in the signature mode when
BYTE
is low
DQ0–DQ7
IO
DATA INPUTSOUTPUTS
Inputs array data on the second CE
and WE
cycle during a
program command Inputs commands to the command user interface when CE
and WE
are active Data is internally latched during the write and program cycles Outputs array
Intelligent Identifier and Status Register data The data pins float to tri-state when the chip is
deselected or the outputs are disabled
DQ8–DQ15
IO
DATA INPUTSOUTPUTS
Inputs array data on the second CE
and WE
cycle during a
program command Data is internally latched during the write and program cycles Outputs
array data The data pins float to tri-state when the chip is deselected or the outputs are
disabled as in the byte-wide mode (BYTE
e
‘‘0’’) In the byte-wide mode DQ15 Ab1
becomes the lowest order address for data output on DQ0-DQ7
CE
I
CHIP ENABLE
Activates the device’s control logic input buffers decoders and sense
amplifiers CE
is active low CE
high deselects the memory device and reduces power
consumption to standby levels If CE
and RP
are high but not at a CMOS high level the
standby current will increase due to current flow through the CE
and RP
input stages
RP
I
RESETDEEP POWER-DOWN
Provides three-state control Puts the device in deep power-
down mode Locks the boot block from programerase
When RP
is at logic high level and equals 65V maximum the boot block is locked and
cannot be programmed or erased
When RP
e
114V minimum the boot block is unlocked and can be programmed or
erased
When RP
is at a logic low level the boot block is locked the deep power-down mode is
enabled and the WSM is reset preventing any blocks from being programmed or erased
therefore providing data protection during power transitions
When RP
transitions from logic low to logic high the flash memory enters the read-array
mode
OE
I
OUTPUT ENABLE
Gates the device’s outputs through the data buffers during a read cycle
OE
is active low
WE
I
WRITE ENABLE
Controls writes to the Command Register and array blocks WE
is active
low Addresses and data are latched on the rising edge of the WE
pulse
BYTE
I
BYTE
ENABLE
Controls whether the device operates in the byte-wide mode (x8) or the
word-wide mode (x16) BYTE
pin must be controlled at CMOS levels to meet 100A CMOS
current in the standby mode BYTE
e
‘‘0’’ enables the byte-wide mode where data is read
and programmed on DQ0–DQ7 and DQ15 Ab1 becomes the lowest order address that
decodes between the upper and lower byte DQ8–DQ14 are tri-stated during the byte-wide
mode BYTE
e
‘‘1’’ enables the word-wide mode where data is read and programmed on
DQ0–DQ15
VPP
PROGRAMERASE POWER SUPPLY
For erasing memory array blocks or programming
data in each block
Note
VPP k VPPLMAX memory contents cannot be altered
VCC
DEVICE POWER SUPPLY (5V g10% 5V g5%)
GND
GROUND
For all internal circuitry
NC
NO CONNECT
Pin may be driven or left floating
DU
DON’T USE PIN
Pin should not be connected to anything
9
相关PDF资料 |
PDF描述 |
|---|---|
| E28F400BX-B80 | 4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F400BX-T120 | 4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F004BX-T120 | OSC 5V SMT PLAS 14X9 CMOS |
| E2SAA10-30.000MTR | QUARTZ CRYSTAL RESONATOR, 30 MHz |
| E2SDA18-13.560M | QUARTZ CRYSTAL RESONATOR, 13.56 MHz |
相关代理商/技术参数 |
参数描述 |
|---|---|
| E28F400BX-B80 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F400BX-T120 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F400BX-T60 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F400BX-T80 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY |
| E28F400CVB60 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
发布紧急采购，3分钟左右您将得到回复。