参数资料
型号: EDI816256CA
英文描述: 256Kx16 Monolithic SRAM(CMOS,256Kx16单片静态RAM)
中文描述: 256Kx16单片的SRAM(的CMOS,256Kx16单片静态内存)
文件页数: 4/7页
文件大小: 118K
代理商: EDI816256CA
4
White Electronic Designs Corporation Phoenix, AZ (602) 437-1520
EDI816256CA
WS32K32-XHX
WRITE CYCLE - CS CONTROLLED
WRITE CYCLE - LB, UB CONTROLLED
TIMING WAVEFORM - READ CYCLE
WRITE CYCLE - WE CONTROLLED
ADDRESS
READ CYCLE 2 (WE HIGH)
tAVQV
tELQV
tGLQV
tELQX
tGLQX
tAVAV
tEHQZ
tGHQZ
OE
tLBLQX
tUBLQX
tLBHQZ
tUBHQZ
LB, UB
CS
tLBLQV
tUBLQV
DATA I/O
ADDRESS
DATA I/O
READ CYCLE 1 (WE HIGH; OE, CS LOW)
tAVQX
tAVQV
tAVAV
DATA 2
ADDRESS 1
ADDRESS 2
DATA 1
ADDRESS
DATA IN
WRITE CYCLE 1, WE CONTROLLED
tAVWH
tELWH
tWHAX
tWLWH
tDVWH
tWLQZ
tWHQX
tAVWL
tWHDX
tAVAV
DATA VALID
HIGH
WE
tLBLLBH
tUBLUBH
CS
DATA OUT
LB, UB
WRITE CYCLE 2, CS CONTROLLED
tAVEH
tELEH
tEHAX
tWLEH
tDVEH
tEHDX
tAVAV
DATA VALID
HIGH
tLBLLBH
tUBLUBH
tAVEL
ADDRESS
DATA IN
WE
LB, UB
CS
DATA OUT
ADDRESS
DATA IN
DATA OUT
WRITE CYCLE 3, LB, UB CONTROLLED
tAVWH
tAVUBL
tWHAV
tAVUBH
tWLWH
tWLQX
tAVAV
CS
WE
DATA UNDEFINED
DATA VALID
tUBHAV
tWHDX
tDVWH
tUBLUBH
LB, UB
HIGH Z
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