参数资料
型号: EM260-RTR
厂商: Silicon Laboratories Inc
文件页数: 6/50页
文件大小: 0K
描述: IC ZIGBEE SYSTEM-ON-CHIP 40-QFN
标准包装: 1
频率: 2.4GHz
数据传输率 - 最大: 250kbps
调制或协议: 802.15.4
应用: ZigBee?
功率 - 输出: -32dBm ~ 3dBm
灵敏度: -97dBm
电源电压: 2.1 V ~ 3.6 V
电流 - 接收: 30mA
电流 - 传输: 34mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 40-VFQFN 裸露焊盘
包装: 标准包装
配用: 636-1009-ND - PROGRAMMER USB FLASH EM250/260
其它名称: 636-1007-6
EM260
Pin #
Signal
Directio
Description
n
24
25
26
27
28
29
VDD_PADS
N.C.
TXD
nHOST_INT
RXD
SIF_CLK
SIF_MISO
SIF_MOSI
Power
I
O
O
I
I
O
I
Pads supply (2.1 – 3.6V)
When using the SPI interface, this signal is left not connected.
UART Transmitted Data (from EM260 to Host)
SPI Host Interrupt signal (from EM260 to Host)
UART Received Data (from Host to EM260)
Programming and Debug Interface, Clock (internal pull down)
Programming and Debug Interface, Master In / Slave Out
Programming and Debug Interface, Master Out / Slave In (external pull-down
required to guarantee state in Deep Sleep Mode)
30
31
32
33
34
35
36
37
38
39
40
41
nSIF_LOAD
GND
VDD_FLASH
SDBG
LINK_ACTIVITY
nWAKE
N.C.
VDD_CORE
VDD_SYNTH_PRE
OSCB
OSCA
VDD_24MHZ
GND
I/O
Power
Power
O
O
I
I
Power
Power
I/O
I/O
Power
Ground
Programming and Debug Interface, load strobe (open collector with internal pull up)
Ground Supply
1.8V Flash memory supply; should be connected to VREG_OUT
Spare Debug signal
Link and Activity signal
SPI Wake Interrupt signal (from Host to EM260)
When using the UART interface, this signal is left not connected.
1.8V digital core supply; should be connected to VREG_OUT
1.8V synthesizer and prescalar supply; should be connected to VREG_OUT
24MHz crystal oscillator or left open for when using an external clock input on OSCA
24MHz crystal oscillator or external clock input
1.8V high-frequency oscillator supply; should be connected to VREG_OUT
Ground supply pad in the bottom center of the package forms Pin 41 (see the EM260
Reference Design for PCB considerations)
120-0260-000M Rev 1.1
Page 6
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