参数资料
型号: EP9307-CRZR
厂商: Cirrus Logic Inc
文件页数: 4/16页
文件大小: 0K
描述: IC ARM920T 200MHZ PROC 272 TFBGA
标准包装: 500
系列: EP9
核心处理器: ARM9
芯体尺寸: 16/32-位
速度: 200MHz
连通性: EBI/EMI,以太网,I²C,IrDA,键盘/触摸屏,SPI,UART/USART,USB
外围设备: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
输入/输出数: 14
程序存储器类型: ROMless
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 272-LFBGA
其它名称: Q5809834A
12
ER667E2B
Description 7
The coprocessor can incorrectly update one of its destination accumulators even if the coprocessor
instruction should not have been executed or is canceled by the ARM processor. This error can occur if the
following is true:
1) The first instruction must be a coprocessor compare instruction, one of cfcmp32, cfcmp64, cfcmps, and
cfcmpd.
2) The second instruction:
- has an accumulator as a destination3.
- does not execute1.
Example 1: In this case the second instruction may modify a2 even if the condition is not matched.
cfcmp32
r15, c0, c5
cfmva64ne
a2, c8
Example 2: In this case the second instruction may modify a2 even if an interrupt or exception causes it to
be canceled and re-executed after the interrupt/exception handler returns.
cfcmp32
r15, c0, c5
cfmadda
a2, a2, c0, c1
Workaround
The workaround for this issue is to insure that at least one other instruction appears between these
instructions. For example, possible fixes for the instructions sequences above are:
cfcmp32
r15, c0, c5
nop
cfmva64ne
a2, c8
and
cfcmp32
r15, c0, c5
nop
cfmadda
a2, a2, c0, c1
Description 8
If a data abort occurs on an instruction preceding a coprocessor data path instruction that writes to one of
the accumulators3, the accumulator may be updated even though the instruction was canceled.
For example:
str
r7, [r0, #0x1d]
; assume this causes a data abort
cfmadda32
a0, a2, c0, c1
The second instruction will update a0 even though it should be canceled due to the data abort on the
previous instruction.
(Continued)
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