参数资料
型号: EP9307-CRZR
厂商: Cirrus Logic Inc
文件页数: 5/16页
文件大小: 0K
描述: IC ARM920T 200MHZ PROC 272 TFBGA
标准包装: 500
系列: EP9
核心处理器: ARM9
芯体尺寸: 16/32-位
速度: 200MHz
连通性: EBI/EMI,以太网,I²C,IrDA,键盘/触摸屏,SPI,UART/USART,USB
外围设备: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
输入/输出数: 14
程序存储器类型: ROMless
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 272-LFBGA
其它名称: Q5809834A
ER667E2B
13
Workaround
A complete software workaround requires ensuring that data aborts do not occur due to any instruction
immediately preceding a coprocessor instruction that writes to an accumulator. The only way to ensure this
is to not allow memory operations immediately preceding these types of instructions. For example, the fixes
for the instructions above are:
str
r7, [r0, #0x1d]
; assume this causes a data abort
nop
cfmadda32
a0, a2, c0, c1
Description 9
The coprocessor will erroneously update an accumulator if the coprocessor instruction that updates an
accumulator is canceled and is followed by a coprocessor instruction that is not a data path instruction. This
error will occur under the following conditions:
1) The first instruction:
- must update a coprocessor accumulator3.
- does not execute1.
2) The second instruction is not a coprocessor data path instruction. Coprocessor data path instructions
include any instruction that does not move data to or from memory or to or from the ARM registers.
For example:
cfmva64ne
a2, c3
cfmvr64l
r4, c15
If the first instruction should not execute or is interrupted, it may incorrectly update a2.
Workaround
Because any instruction may be canceled due to an asynchronous interrupt, the most general software
workaround is to insure that no instruction that updates an accumulator is followed immediately by a non-
data path coprocessor instruction. For example, the fix for the instruction sequence above is:
cfmva64ne
a2, c3
nop
cfmvr64l
r4, c15
Description 10
An instruction that writes a result to an accumulator3 may cause corruption of any of the four accumulators
when the coprocessor is operating in serialized mode2.
For example, the following sequence of instructions may corrupt a2 if the second instruction is not executed.
cfmadda32
a0, a2, c0, c1
cfmadda32ne
a2, c3, c0, c1
Workaround
The only workaround for this issue is to operate the coprocessor in unserialized mode.
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