参数资料
型号: EPC16QI100
厂商: Altera
文件页数: 1/36页
文件大小: 0K
描述: IC CONFIG DEVICE 16MBIT 100-PQFP
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 66
系列: EPC
可编程类型: 系统内可编程
存储容量: 16Mb
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 100-BQFP
供应商设备封装: 100-PQFP(14x20)
包装: 托盘
产品目录页面: 604 (CN2011-ZH PDF)
其它名称: 544-1227
January 2012
Altera Corporation
CF52002-3.0
Datasheet
2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS,
QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark
Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their
respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor
products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use
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Enhanced Configuration (EPC) Devices
Datasheet
This datasheet describes enhanced configuration (EPC) devices.
Supported Devices
Table 1 lists the supported Altera EPC devices.
Features
EPC devices offer the following features:
Single-chip configuration solution for Altera ACEX 1K, APEX 20K (including
APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria GX, Cyclone,
Cyclone II, FLEX 10K (including FLEX 10KE and FLEX 10KA), Mercury,
Stratix II, and Stratix II GX devices
Contains 4-, 8-, and 16-Mb flash memories for configuration data storage
On-chip decompression feature almost doubles the effective configuration
density
Standard flash die and a controller die combined into single stacked chip package
External flash interface supports parallel programming of flash and external
processor access to unused portions of memory
Flash memory block or sector protection capability using the external flash
interface
Supported in EPC4 and EPC16 devices
Page mode support for remote and local reconfiguration with up to eight
configurations for the entire system
Compatible with Stratix series remote system configuration feature
Supports byte-wide configuration mode fast passive parallel (FPP) with an 8-bit
data output per DCLK cycle
Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs
Table 1. Altera EPC Devices
Device
Memory Size
(bits)
On-Chip
Decompression
Support
ISP Support
Cascading
Support
Reprogrammable
Recommended
Operating
Voltage (V)
EPC4
4,194,304
Yes
No
Yes
3.3
EPC8
8,388,608
Yes
No
Yes
3.3
EPC16
16,777,216
Yes
No
Yes
3.3
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