参数资料
| 型号： | EPC9003 |
| 厂商： | EPC |
| 文件页数： | 3/7页 |
| 文件大小： | 0K |
| 描述： | BOARD DEV FOR EPC2010 200V GAN |
| 应用说明： | Assembling eGaN® FETS Using eGaN® FETs |
| 设计资源： | EPC9003 Gerber Files EPC9003 Bill of Materials EPC9003 Schematic |
| 特色产品： | EPC Development Tools |
| 标准包装： | 1 |
| 系列： | eGaN® |
| 主要目的： | 电源管理，半 H 桥驱动器（外部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | EPC2010 |
| 主要属性： | 200V，5A 最大输出 GaNFET 功率 |
| 次要属性： | GaNFET 驱动器电路，采用 7 ~ 12V 电压 |
| 已供物品： | 板 |
| 相关产品： | 917-1016-2-ND - TRANS GAN 200V 12A BUMPED DIE 917-1016-1-ND - TRANS GAN 200V 12A BUMPED DIE |
| 其它名称： | 917-1012 |
Quick Start Procedure
Development board EPC9003 is easy to set up to evaluate the performance of the EPC2010 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1.
2.
3.
4.
5.
6.
7.
8.
With power off, connect the input power supply bus to +V IN (J5, J6) and ground / return to –V IN (J7, J8).
With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
With power off, connect the gate drive input to +V DD (J1, Pin-1) and ground return to –V DD (J1, Pin-2).
With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 200 V on V OUT ).
Turn on the controller / PWM input source and probe switching node to see switching operation.
Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
THERMAL CONSIDERATIONS
The EPC9003 development board showcases the EPC2010 eGaN FET. Although the electrical performance surpasses that for traditional silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9003 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
NOTE. The EPC9003 development board does not have any current or thermal protection on board.
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