参数资料
型号: EPM9560ARI240-10
厂商: Altera
文件页数: 14/46页
文件大小: 0K
描述: IC MAX 9000 CPLD 560 240-RQFP
产品变化通告: Package Change 30/Jun/2010
标准包装: 24
系列: Max® 9000
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 10.0ns
电压电源 - 内部: 4.5 V ~ 5.5 V
逻辑元件/逻辑块数目: 35
宏单元数: 560
门数: 12000
输入/输出数: 191
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 240-BFQFP 裸露焊盘
供应商设备封装: 240-RQFP(32x32)
包装: 托盘
其它名称: 544-2365
Altera Corporation
21
MAX 9000 Programmable Logic Device Family Data Sheet
By combining the pulse and shift times for each of the programming
stages, the program or verify time can be derived as a function of the TCK
frequency, the number of devices, and specific target device(s). Because
different ISP-capable devices have a different number of EEPROM cells,
both the total fixed and total variable times are unique for a single device.
Programming a Single MAX 9000 Device
The time required to program a single MAX 9000 device in-system can be
calculated from the following formula:
where: tPROG
= Programming time
tPPULSE
= Sum of the fixed times to erase, program, and
verify the EEPROM cells
CyclePTCK =Number of TCK cycles to program a device
fTCK
= TCK frequency
The ISP times for a stand-alone verification of a single MAX 9000 device
can be calculated from the following formula:
where: tVER
=Verify time
tVPULSE
= Sum of the fixed times to verify the EEPROM cells
CycleVTCK =Number of TCK cycles to verify a device
t
PR OG
t
PP ULSE
Cyc le
PTC K
f
TCK
--------------------------------
+
=
t
VER
t
VPULSE
Cycle
VTC K
f
TC K
--------------------------------
+
=
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