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参数资料
| 型号： | EVAL-AD5100EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/36页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5100 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电源监控器/跟踪器/序列发生器 |
| 已用 IC / 零件： | AD5100 |
| 主要属性： | 电压检测器和监控器 |
| 次要属性： | 开漏极输出 |
| 已供物品： | 板 |
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AD5100
WRITING DATA TO AD5100
?
If the address pointer is known to be already at the desired
When writing data to the AD5100, the user begins by writing
an address byte followed by the R/W bit set to 0. The AD5100
acknowledges (if the correct address byte is used) by pulling
the SDA line low during the ninth clock pulse. The user then
follows with two data bytes. The first data byte is the address of
the internal data register to be written to, which is stored in the
address pointer register. The second byte is the data to be written
to the internal data register. After each byte, the AD5100
acknowledges by pulling the SDA line low during the ninth
clock pulse. Figure 21 illustrates this operation.
address, data can be read from the corresponding data
register without first writing to the address pointer register.
tain the data from the register just read. Bit 7 is a reserved bit
and should be ignored for normal read operations. The majority
of AD5100 registers are four bits wide, with only the fault detect
and status register and disable special functions register at seven
bits and five bits wide, respectively.
Table 14. Readback Data Byte Structure
READING DATA FROM AD5100
When reading data from an AD5100 register, there are two
possibilities.
Bit Number
7
6
5
Function
Reserved
D6
D5
?
If the AD5100 address pointer register value is unknown
or not at the desired value, it is first necessary to set it to
the correct value before data can be read from the desired
data register. This is done by performing a write to the
AD5100, but only a value containing the register address
4
3
2
1
0
D4
D3
D2
D1
D0 (LSB)
is sent because data is not to be written to the register. This
is shown in Figure 22. A read operation is then performed
consisting of the serial bus address, R/W bit set to 1,
followed by the data byte from the data register. This is
SCL
SDA
0
1
0
1
1
1
AD0 R/W
OTP AP6 AP5 AP4 AP3 AP2 AP1 AP0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
AD5100
ACK. BY
AD5100
ACK. BY
AD5100
START BY
MASTER
FRAME 1
SLAVE ADDRESS BYTE
FRAME 2
ADDRESS POINTER BYTE
FRAME 3
DATA BYTE
STOP BY
MASTER
Figure 21. Writing a Register Address to the Address Pointer Register, Then Writing Data to the Selected Register
SCL
SDA
0
1
0
1
1
1
AD0 R/W
OTP AP6 AP5 AP4 AP3 AP2 AP1 AP0
ACK. BY
AD5100
ACK. BY
AD5100
START BY
MASTER
FRAME 1
SLAVE ADDRESS BYTE
FRAME 2
ADDRESS POINTER BYTE
STOP BY
MASTER
Figure 22. Dummy Write to Set Proper Address Pointer
SCL
SDA
0
1
0
1
1
1
AD0 R/W
OTP D6
D5
D4
D3
D2
D1
D0
OK
ACK. BY
AD5100
NO ACK. BY
MASTER
START BY
MASTER
FRAME 1
SLAVE ADDRESS BYTE
FRAME 2
READ DATA BYTE
STOP BY
MASTER
Figure 23. Read Data from the Address Pointer Register
Rev. A | Page 27 of 36
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