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参数资料
| 型号： | EVAL-AD5290EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5290 |
| 设计资源： | AD5290 Evaluation Tools |
| 标准包装： | 1 |
| 主要目的： | 数字电位器 |
| 已用 IC / 零件： | AD5290 |
| 已供物品： | 板 |
| 相关产品： | AD5290YRMZ50-R7-ND - IC POT DGTL 50KW 256POS 10-MSOP AD5290YRMZ10-R7-ND - IC POT DGTL 10KW 256POS 10-MSOP AD5290YRMZ100-R7-ND - IC POT DGTL 100KW 256POS 10-MSOP AD5290YRMZ50-ND - IC DGTL POT 50K 256POS 10MSOP AD5290YRMZ100-ND - IC DGTL POT 100K 256POS 10MSOP AD5290YRMZ10-ND - IC DGTL POT 10K 256POS 10MSOP |
Data Sheet
AD5290
Rev. C | Page 15 of 20
THEORY OF OPERATION
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The part operates in the rheostat mode when only two termi-
nals are used as a variable resistor. The unused terminal can
be floating or tied to the W terminal as shown in Figure 26.
A
W
B
A
W
B
A
W
B
04716-011
Figure 26. Rheostat Mode Configuration
The nominal resistance between Terminal A and Terminal B,
RAB, is available in 10 k, 50 k, and 100 k with ±30% toler-
ance and has 256 tap points accessed by the wiper terminal. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings. Figure 27 shows a simplified RDAC structure.
4RS
2RS
RS
RW
W
RS
2RS
4RS
A
RW
B
8-BIT ADDRESS
DECODER
04716-012
Figure 27. AD5290 Simplified RDAC Circuit.
(RS = Step Resistor, RW = Wiper Resistor)
In order to achieve optimum cost performance, Analog Devices
has patented the RDAC segmentation architecture for all the
digital potentiometers. In particular, the AD5290 employs a
3-stage segmentation approach as shown in Figure 27. As
a result, the general equation determining the digitally
programmed output resistance between the W terminal
and B terminal is
W
AB
WB
R
D
R
×
+
×
=
3
256
)
(
(1)
where:
D is the decimal equivalent of the binary code loaded in
the 8-bit RDAC register from 0 to 255.
RAB is the end-to-end resistance.
RW is one of the wiper resistances contributed by the on
resistance of an internal switch.
The AD5290 wiper switch is designed with the transmission
gate CMOS topology and with the gate voltage derived from
VDD. The wiper resistance, RW, is a function of VDD and
temperature. Contrary to the temperature coefficient of the RAB,
which is only 35 ppm/°C, the temperature coefficient of the wiper
resistance is significantly higher because the wiper resistance
doubles from 25°C to 125°C. As a result, the user must take into
consideration the contribution of RW on the desirable
resistance. On the other hand, the wiper resistance is insensitive
to the tap point potential. As a result, RW remains relatively flat
at a given VDD and temperature at various codes.
Assuming that an ideal 10 k part is used, the wiper’s first
connection starts at the B terminal for the programming code
of 0x00 where SWB is closed. The minimum resistance between
Terminal W and Terminal B is, therefore, generally 150 . The
second connection is the first tap point, which corresponds to
189 (RWB = 1/256 × RAB + 3RW = 39 + 150 ) for code 0x01,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,110 .
In the zero-scale condition, a finite total wiper resistance of
150 is present. Regardless of which setting the part is oper-
ating in, care should be taken to limit the current between
the A terminal to B terminal, W terminal to A terminal, and
W terminal to B terminal, to the maximum dc current of 5 mA
or pulse current of 20 mA. Otherwise, degradation, or possible
destruction of the internal switch contact, can occur.
Similar to the mechanical potentiometer, the resistance of
the RDAC between the W terminal and the A terminal also
produces a digitally controlled complementary resistance, RWA.
RWA starts at the maximum resistance value and decreases as
the data loaded into the latch increases. The general equation
for this operation is
W
AB
WA
R
D
R
×
+
×
=
3
256
)
(
(2)
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