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参数资料
| 型号： | EVAL-AD7265EDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/29页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7265 A/D CONV |
| 标准包装： | 1 |
| ADC 的数量： | 2 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | SPI?、QSPI?、MICROWIRE? 和 DSP |
| 输入范围： | 0 ~ 5 V |
| 在以下条件下的电源（标准）： | 7mW @ 3V，17mW @ 5V |
| 工作温度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7265 |
| 已供物品： | 板 |
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AD7265
Rev. A | Page 18 of 28
TRANSFER FUNCTIONS
DIGITAL INPUTS
The designed code transitions occur at successive integer LSB
values (1 LSB, 2 LSB, and so on). In single-ended mode, the LSB
size is V
The digital inputs applied to the AD7265 are not limited by the
maximum ratings that limit the analog inputs. Instead, the
digital inputs can be applied up to 7 V and are not restricted by
the V
/4096 when the 0 V to V
REF
range is used, and the LSB
size is 2 × V
/4096 when the 0 V to 2 × V
REF
range is used. In
differential mode, the LSB size is 2 × V
+ 0.3 V limit, as are the analog inputs. See the
DD
REF
/4096 when the 0 V to
V
section for more information. Another
advantage of the SCLK, RANGE, A0 to A2, and
REF
range is used, and the LSB size is 4 × VREF/4096 when the
0 V to 2 × V
CS pins not
being restricted by the V
REF
range is used. The ideal transfer characteristic
for the AD7265 when straight binary coding is output is shown
in
DD
+ 0.3 V limit is that power supply
sequencing issues are avoided. If one of these digital inputs is
applied before V
Figure 32, and the ideal transfer characteristic for the AD7265
when twos complement coding is output is shown (with the 2 ×
V
DD
, there is no risk of latch-up, as there would
be on the analog inputs if a signal greater than 0.3 V were
applied prior to V
range) in Figure 33.
REF
DD
.
04674-027
000...000
111...111
1LSB = VREF/4096
1LSB
VREF – 1LSB
ANALOG INPUT
ADC
CODE
0V
000...001
000...010
111...110
111...000
011...111
NOTE
1. VREF IS EITHER VREF OR 2 × VREF.
VDRIVE
The AD7265 also has a VDRIVE feature to control the voltage at
which the serial interface operates. VDRIVE allows the ADC to
easily interface to both 3 V and 5 V processors. For example, if
the AD7265 was operated with a V
of 5 V, the V
DD
DRIVE
pin
could be powered from a 3 V supply, allowing a large dynamic
range with low voltage digital processors. Therefore, the
AD7265 could be used with the 2 × V
input range, with a V
REF
DD
of 5 V while still being able to interface to 3 V digital parts.
Figure 32. Straight Binary Transfer Characteristic
04674-028
100...000
011...111
1LSB = 2
× VREF/4096
+VREF – 1 LSB
–VREF + 1LSB VREF – 1LSB
ANALOG INPUT
ADC
CODE
100...001
100...010
011...110
000...001
000...000
111...111
Figure 33. Twos Complement Transfer Characteristic with
V
± V
Input Range
REF
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