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参数资料
| 型号： | EVAL-AD7739EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7739 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 15.1k |
| 数据接口： | 串行 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 85mW @ 5V |
| 工作温度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7739 |
| 已供物品： | 板 |
| 相关产品： | AD7739BRUZ-REEL7-ND - IC ADC 24BIT 8CH SIG-DEL 24TSSOP AD7739BRUZ-ND - IC ADC 24BIT 8-CH 24-TSSOP AD7739BRU-REEL-ND - IC ADC 24BIT 8CH SIG-DEL 24TSSOP AD7739BRU-ND - IC ADC 24BIT 8-CH 24-TSSOP |
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AD7739
Data Sheet
Rev. A | Page 26 of 32
MULTIPLEXER, CONVERSION, AND DATA
OUTPUT TIMING
The specified conversion time includes one or two settling and
sampling periods and a scaling time.
With chopping enabled (Figure 23), a conversion cycle starts
with a settling time of 43 MCLK cycles or 44 MCLK cycles
(~7 s with a 6.144 MHz MCLK) to allow the circuits following
the multiplexer to settle. The Σ-Δ modulator then samples the
analog signals and the digital filter processes the digital data
stream. The sampling time depends on FW, that is, on the
channel conversion time register contents. After another
settling of 42 MCLK cycles (~6.8 s), the sampling time is
repeated with a reversed (chopped) analog input signal. Then,
during the scaling time of 163 MCLK cycles (~26.5 s), the
two results from the digital filter are averaged, scaled using the
calibration registers, and written into the channel data register.
With chopping disabled (Figure 24), only one sampling time is
preceded by a settling time of 43 MCLK or 44 MCLK cycles and
followed by a scaling time of 163 MCLK cycles.
The RDY pin goes high during the scaling time, regardless of its
previous state. The relevant RDY bit is set in the ADC status
register and in the channel status register, and the RDY pin goes
low when the channel data register is updated and the channel
conversion cycle is finished. If in continuous conversion mode,
the part automatically continues with a conversion cycle on the
next enabled channel.
Note that every channel can be configured independently for
conversion time and chopping mode. The overall cycle and
effective per channel data rates depend on all enabled
channel settings.
Figure 23. Multiplexer and Conversion Timing—Continuous Conversion on Several Channels with Chopping Enabled
Figure 24. Multiplexer and Conversion Timing—Continuous Conversion on Several Channels with Chopping Disabled
– CHANNEL 1
SCALING
TIME
SAMPLING
TIME
+ CHANNEL 1
SAMPLING
TIME
SETTLING
TIME
MULTIPLEXER
– CHANNEL 0
RDY
SETTLING
TIME
CONVERSION TIME
03742-0-024
SCALING
TIME
CHANNEL 1
SAMPLING
TIME
MULTIPLEXER
CHANNEL 0
RDY
SETTLING
TIME
CONVERSION TIME
03742-0-025
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| EVAL-AD7741/42EB | 制造商:Analog Devices 功能描述:Evaluation Board For Single And Multi-Channel Synchronous Voltage-To-Frequency Converters 制造商:Analog Devices 功能描述:EVALUATION BOARD IC - Bulk |
| EVAL-AD7741/42EBZ | 功能描述:BOARD EVAL FOR AD7741/7742 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
| EVAL-AD7741-42EBZ | 制造商:AD 制造商全称:Analog Devices 功能描述:Single and Multichannel, Synchronous Voltage-to-Frequency Converters |
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