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参数资料
| 型号： | EVAL-AD7923CBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7923 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 200k |
| 数据接口： | 串行 |
| 输入范围： | 0 ~ 2.5 V |
| 在以下条件下的电源（标准）： | 7.5mW @ 200kSPS，5 V |
| 工作温度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7923 |
| 已供物品： | 板，CD |
| 相关产品： | AD7923BRUZ-REEL7TR-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-REEL-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP AD7923BRUZ-ND - IC ADC 12BIT 4CH W/SEQ 16TSSOP |
AD7923
Data Sheet
Rev. D | Page 16 of 24
TYPICAL CONNECTION DIAGRAM
Figure 19 shows a typical connection diagram for the AD7923.
In this setup the AGND pin is connected to the analog ground
decoupled 2.5 V supply from a reference source, the AD780, to
provide an analog input range of 0 V to 2.5 V (if the range bit is
1) or 0 V to 5 V (if the range bit is 0). Although the AD7923 is
connected to AVDD of 5 V, the serial interface is connected to a
3 V microprocessor. The VDRIVE pin of the AD7923 is connected
to the same 3 V supply of the microprocessor to allow a 3 V
logic interface (see the Digital Inputs section). The conversion
result is output in a 16-bit word. This 16-bit data stream
consists of two leading 0s, two address bits indicating which
channel the conversion result corresponds to, followed by the
12 bits of conversion data. For applications where power
consumption is a concern, the power-down modes should be
used between conversions or bursts of several conversions to
improve power performance. See the Modes of Operation
section.
SERIAL
INTERFACE
AD780
2.5V
AD7923
0.1
F
C/P
0.1
F
10
F
3V
SUPPLY
5V
SUPPLY
0.1
F
10
F
AGND
AVDD
0V TO REFIN
SCLK
DOUT
CS
DIN
VDRIVE
REFIN
NOTES
1. ALL UNUSED INPUT CHANNELS MUST BE CONNECTED TO AGND.
VIN0
VIN3
03086-019
Figure 19. Typical Connection Diagram
Analog Input Selection
Any one of four analog input channels can be selected for
conversion by programming the multiplexer with Address Bits
ADD1 and ADD0 in the control register. The channel
configurations are shown in Table 7.
The AD7923 can also be configured to automatically cycle
through selected channels. The sequencer feature is accessed via
the SEQ1 and SEQ0 bits in the control register (see Table 9).
The AD7923 can be programmed to continuously convert on a
number of consecutive channels in ascending order from
Channel 0 to a selected final channel as determined by Channel
Address Bits ADD1 and ADD0. This is possible if the SEQ1 and
SEQ0 bits are set to 1, 1. The next serial transfer then acts on
the sequence programmed by executing a conversion on
Channel 0. The next serial transfer results in a conversion on
Channel 1, and so on, until the channel selected via Address
Bits ADD1 and ADD0 is reached. It is not necessary to write to
the control register again once a sequencer operation has been
initiated. The write bit must be set to 0 or the DIN line must be
set low to ensure that the control register is not accidentally
overwritten or the sequence operation is interrupted. If the
control register is written to at any time during the sequence,
the user must ensure that the SEQ1 and SEQ0 bits are set to 1, 0
to avoid interrupting the automatic conversion sequence. This
pattern continues until the AD7923 is written to and the SEQ1
and SEQ0 bits are configured with any bit combination except
1, 0, resulting in the termination of the sequence. If uninter-
rupted, however (write bit = 0, or write bit = 1 and SEQ1 and
SEQ0 bits are set to 1, 0), then upon completion of the
sequence, the AD7923 sequencer returns to Channel 0 and
commences the sequence again.
Regardless of which channel selection method is used, the
16-bit word output from the AD7923 during each conversion
always contains two leading 0s, and two channel address bits
that the conversion result corresponds to, followed by the 12-bit
conversion result. (see the Serial Interface section).
Digital Inputs
The digital inputs applied to the AD7923 are not limited by the
maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
AVDD + 0.3 V limit as on the analog inputs.
Another advantage of SCLK, DIN, and CS not being restricted
by the AVDD + 0.3 V limit is that possible power supply
sequencing issues are avoided. If CS, DIN, or SCLK are applied
before AVDD, there is no risk of latchup as there would be on the
analog inputs if a signal greater than 0.3 V were applied prior to
AVDD.
VDRIVE
The AD7923 also has the VDRIVE feature. VDRIVE controls the
voltage at which the serial interface operates. VDRIVE allows the
ADC to easily interface to both 3 V and 5 V processors. For
example, if the AD7923 were operated with an AVDD of 5 V, the
VDRIVE pin could be powered from a 3 V supply. The AD7923
has a larger dynamic range with an AVDD of 5 V while still being
able to interface to 3 V processors. Care should be taken to
ensure that VDRIVE does not exceed AVDD by more than 0.3 V
(see the Absolute Maximum Ratings section).
Reference
An external reference source should be used to supply the 2.5 V
reference to the AD7923. Errors in the reference source result in
gain errors in the AD7923 transfer function and add to the
specified full-scale errors of the part. A capacitor of at least
0.1 F should be placed on the REFIN pin. Suitable reference
sources for the AD7923 include the AD780, REF 192, and the
AD1582.
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