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| 型号： | EVAL-ADUC7024QSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 60/104页 |
| 文件大小： | 0K |
| 描述： | KIT DEV QUICK START ADUC7024 |
| 产品培训模块： | ARM7 Applications & Tools Intro to ARM7 Core & Microconverters |
| 设计资源： | ADUC7024 Dev System Schematic/Brd Outline 7024 Gerber Files |
| 标准包装： | 1 |
| 系列： | QuickStart™ 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC7024 |
| 所含物品： | 评估板、电源、缆线、软件和说明文档 |
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Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 59 of 104
Example source code
t2val_old= T2VAL;
T2LD = 5;
TCON = 0x480;
while ((T2VAL == t2val_old) || (T2VAL >
3)) //ensures timer value loaded
IRQEN = 0x10;
//enable T2 interrupt
PLLKEY1 = 0xAA;
PLLCON = 0x01;
PLLKEY2 = 0x55;
POWKEY1 = 0x01;
POWCON = 0x27;
// Set Core into Nap mode
POWKEY2 = 0xF4;
In noisy environments, noise can couple to the external crystal
pins, and PLL may lose lock momentarily. A PLL interrupt is
provided in the interrupt controller. The core clock is immediately
halted, and this interrupt is only serviced when the lock is restored.
In case of crystal loss, the watchdog timer should be used. During
initialization, a test on the RSTSTA register can determine if the
reset came from the watchdog timer.
External Clock Selection
To switch to an external clock on P0.7, configure P0.7 in
Mode 1. The external clock can be up to 44 MHz, providing
the tolerance is 1%.
Example source code
t2val_old= T2VAL;
T2LD = 5;
TCON = 0x480;
while ((T2VAL == t2val_old) || (T2VAL
> 3)) //ensures timer value loaded
IRQEN = 0x10;
//enable T2 interrupt
PLLKEY1 = 0xAA;
PLLCON = 0x03; //Select external clock
PLLKEY2 = 0x55;
POWKEY1 = 0x01;
POWCON = 0x27;
// Set Core into Nap mode
POWKEY2 = 0xF4;
Power Control System
A choice of operating modes is available on the ADuC7019/20/
21/22/24/25/26/27/28/29. Table 57 describes what part is powered
on in the different modes and indicates the power-up time.
Table 58 gives some typical values of the total current consump-
tion (analog + digital supply currents) in the different modes,
depending on the clock divider bits. The ADC is turned off. Note
that these values also include current consumption of the
regulator and other parts on the test board where these values
are measured.
Table 57. Operating Modes1
Mode
Core
Peripherals
PLL
XTAL/T2/T3
IRQ0 to IRQ3
Start-Up/Power-On Time
Active
X
130 ms at CD = 0
Pause
X
24 ns at CD = 0; 3 s at CD = 7
Nap
X
24 ns at CD = 0; 3 s at CD = 7
Sleep
X
1.58 ms
Stop
X
1.7 ms
1
X indicates that the part is powered on.
Table 58. Typical Current Consumption at 25°C in Milliamperes
PC[2:0]
Mode
CD = 0
CD = 1
CD = 2
CD = 3
CD = 4
CD = 5
CD = 6
CD = 7
000
Active
33.1
21.2
13.8
10
8.1
7.2
6.7
6.45
001
Pause
22.7
13.3
8.5
6.1
4.9
4.3
4
3.85
010
Nap
3.8
011
Sleep
0.4
100
Stop
0.4
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