参数资料
型号: FA5515P
厂商: FUJI ELECTRIC CO LTD
元件分类: 稳压器
英文描述: 1.5 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDIP8
封装: DIP-8
文件页数: 9/22页
文件大小: 260K
代理商: FA5515P
FA551X
17
6. Overvoltage protection using CS pin
These ICs contain the overvoltage protection function detecting
Vcc voltage. However, the threshold voltage is fixed. Adding a
circuit to CS pin enables the overvoltage protection detecting
desired voltage.
6.1 Detecting on secondary side
Figure 25 shows the overvoltage shutdown circuit based on the
signal from the secondary side. The optocoupler output
transistor is connected between the CS and VCC pins. When
the output voltage is put in the overvoltage state, the
optocoupler output transistor goes on to raise the CS pin
voltage via resistor R2. When the CS pin voltage exceeds the
reference voltage (8.5V) of internal comparator, the IC enters
the OFF latch mode and shuts the output down. The IC
consumes current 45A (typ) (Vcc=10V) in latch mode. This
current must be supplied via startup resistor R1. The
overvoltage protection circuit can be reset by lowering the
supply voltage Vcc to below 9.0V or forcing the CS pin voltage
below 7.9V. In normal operation, the CS pin voltage is clamped
by the 4V zener diode with maximum sink current 45A .
Therefore, to raise the CS pin voltage to 8.5V or more, 45A or
a higher current needs to be supplied from the optocoupler. Set
the current input to the CS pin to 1mA or less.
6.2 Detecting on primary side (detecting Vcc voltage)
To attain overvoltage protection, the CS pin voltage is forcibly
raised from outside the IC until it exceeds the reference voltage
(8.5V) of the internal comparator C2. When the reference
voltage is exceeded, the IC enters latch mode and shuts the
output down. Connect a zener diode (ZD) and resistor between
the VCC and CS pins as shown in Figure 26. When the Vcc
voltage exceeds about ZD voltage +8.5V, the IC enters the OFF
latch mode and shuts the output down. If Vcc remains high
even after shutdown and current is input to the CS pin, set the
current to 1mA or lower. Set the zener voltage of the ZD
connected to the CS pin higher than the UVLO ON threshold
voltage. Startup is disabled below this voltage.
Figure 27 shows another circuit for enabling latch mode
shutdown by detecting a desired Vcc voltage using the CS pin.
In this circuit, overvoltage shutdown works when the Vcc
voltage is about the same as the ZD voltage. For this circuit
also, use a ZD voltage higher than the UVLO ON threshold
voltage. Set the current flowing into the CS pin to 1mA or lower.
7. Feedback pin circuit
Figure 28 gives an example of connection in which a feedback
signal is input to the FB pin. If this circuit causes power supply
instability, connect R3 and C4 as shown in Figure 28 to
decrease the frequency gain. Set R3 between several tens of
ohms to several kilohms and C4 between several thousand
picofarads to one microfarad.
If noise is applied to the FB pin, the output pulses may be
lacked or disturbed.
In this case, connect a capacitor C5 as shown in Fig. 29 to
suppress the noise applied to the FB pin. Set the capacitance
of C5 less than 10% of capacitance of C4 and connect C5 as
near the IC as possible.
Fig. 25
Overvoltage shutdown circuit (1)
FA551X
GND
CS
VCC
C2
Cs
R2
R1
PC
Vin
C1
Vout
~
~ +
6
8
4
CS
VCC
R2 ZD
8
6
VCC
CS
Cs
R2
ZD
6
8
OUT
FB
PC1
R3
C4
FA551X
Rs
PC1
Vout
Shunt
regulator
5
2
OUT
FB
FA551X
Rs
5
2
4
C5
GND
PC1
R3
C4
Fig. 26
Overvoltage shutdown circuit (2)
Fig. 27
Overvoltage shutdown circuit (3)
Fig. 28
FB pin circuit (1)
Fig. 29
FB pin circuit (2)
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