参数资料
型号: FDC6310P
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET P-CH DUAL 20V SSOT-6
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Mold Compound Change 08/April/2008
标准包装: 1
系列: PowerTrench®
FET 型: 2 个 P 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 2.2A
开态Rds(最大)@ Id, Vgs @ 25° C: 125 毫欧 @ 2.2A,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 5.2nC @ 4.5V
输入电容 (Ciss) @ Vds: 337pF @ 10V
功率 - 最大: 700mW
安装类型: 表面贴装
封装/外壳: SOT-23-6 细型,TSOT-23-6
供应商设备封装: 6-SSOT
包装: 标准包装
其它名称: FDC6310PFSDKR
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ Max Units
Off Characteristics
BV DSS
? BV DSS
? T J
I DSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
V GS = 0 V, I D = –250 μ A
I D = –250 μ A, Referenced to 25 ° C
V DS = –16 V, V GS = 0 V
–20
–11
–1
V
mV/ ° C
μ A
I GSSF
Gate–Body Leakage, Forward
V GS = 12 V,
V DS = 0 V
100
nA
I GSSR
Gate–Body Leakage, Reverse
V GS = –12 V, V DS = 0 V
–100
nA
On Characteristics
(Note 2)
V GS(th)
? V GS(th)
? T J
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
V DS = V GS , I D = –250 μ A
I D = –250 μ A, Referenced to 25 ° C
–0.6
–1.0
3
–1.5
V
mV/ ° C
R DS(on)
Static Drain–Source
V GS = –4.5 V,
I D = –2.2 A
100
125
m ?
On–Resistance
V GS = –2.5 V, I D = –1.8 A
V GS =–4.5 V, I D =–2.2 A, T J =125 ° C
145
137
190
184
I D(on)
g FS
On–State Drain Current
Forward Transconductance
V GS = –4.5 V,
V DS = –5 V,
V DS = –5 V
I D = –3.5 A
–6
6
A
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = –10 V,
f = 1.0 MHz
V GS = 0 V,
337
88
51
pF
pF
pF
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = –10 V,
V GS = –4.5 V,
V DS = –10 V,
V GS = –4.5 V
I D = –1 A,
R GEN = 6 ?
I D = –2.2 A,
9
12
10
5
3.7
0.65
18
22
20
10
5.2
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
1.3
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Source Diode Forward Current
–0.8
A
V SD
Drain–Source Diode Forward
Voltage
V GS = 0 V, I S = –0.8 A
(Note 2)
0.77
–1.2
V
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a) 130 ° C/W when
mounted on a 0.125
in 2 pad of 2 oz.
copper.
b) 140°/W when mounted
on a .004 in 2 pad of 2 oz
copper
c) 180°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%
FDC6310P Rev C(W)
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