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| 型号： | FDMC6675BZ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET P-CH 30V 9.5A POWER33 |
| 产品目录绘图： | MOSFET MLP 3.3x3.3 |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET P 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 30V |
| 电流 - 连续漏极(Id) @ 25° C： | 9.5A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 14.4 毫欧 @ 9.5A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 65nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 2865pF @ 15V |
| 功率 - 最大： | 2.3W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-MLP，Power33 |
| 供应商设备封装： | MLP（3.3x3.3） |
| 包装： | 标准包装 |
| 产品目录页面： | 1609 (CN2011-ZH PDF) |
| 其它名称： | FDMC6675BZDKR |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
' BV DSS
' T J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I D = -250 P A, V GS = 0 V
I D = -250 P A, referenced to 25 °C
-30
20
V
mV/°C
I DSS
Zero Gate Voltage Drain Current
V DS = -24 V,
V GS = 0 V
T J = 125 °C
-1
-100
P A
I GSS
Gate to Source Leakage Current
V GS = ±25 V, V DS = 0 V
±10
P A
On Characteristics
V GS(th)
' V GS(th)
' T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = -250 P A
I D = -250 P A, referenced to 25 °C
-1.0
-1.9
-6
-3.0
V
mV/°C
V GS = -10 V, I D = -9.5 A
10.7
14.4
r DS(on)
Static Drain to Source On Resistance
V GS = -4.5 V, I D = -6.9 A
17.4
27.0
m :
V GS = -10 V, I D = -9.5 A, T J = 125 °C
15.2
20.5
g FS
Forward Transconductance
V DD = -5 V, I D = -9.5 A
28
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = -15 V, V GS = 0 V,
f = 1 MHz
2154
392
349
2865
525
525
pF
pF
pF
Switching Characteristics
t d(on)
Turn-On Delay Time
11
20
ns
t r
t d(off)
t f
Rise Time
Turn-Off Delay Time
Fall Time
V DD = -15 V, I D = -9.5 A,
V GS = -10 V, R GEN = 6 :
10
44
26
20
71
42
ns
ns
ns
Q g(TOT)
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0 V to -10 V
V GS = 0 V to -5 V
V DD = -15 V,
I D = -9.5 A
46
26
6.4
65
37
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
13
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0 V, I S = -9.5 A
V GS = 0 V, I S = -1.6 A
I F = -9.5 A, di/dt = 100 A/ P s
(Note 2)
(Note 2)
0.89
0.73
24
15
1.3
1.2
38
27
V
V
ns
nC
NOTES:
1. R T JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R T JC is guaranteed by design while R T CA is determined by
the user's board design.
a. 53 °C/W when mounted on
a 1 in 2 pad of 2 oz copper
b.125 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 30 0 P s, Duty cycle < 2.0 %.
3. The diode connected between the gate and source servers only as protection against ESD. No gate overvoltage rating is implied.
?2010 Fairchild Semiconductor Corporation
FDMC6675BZ Rev.D3
2
www.fairchildsemi.com
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