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| 型号： | FDMF6706C |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 15/18页 |
| 文件大小： | 0K |
| 描述： | MODULE DRMOS 40A 1000KHZ 40PQFN |
| 标准包装： | 1 |
| 系列： | XS™ DrMOS |
| 类型： | 高端/低端驱动器 |
| 输入类型： | PWM |
| 输出数： | 1 |
| 电流 - 输出 / 通道： | 40A |
| 电源电压： | 4.5 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-PowerTFQFN |
| 供应商设备封装： | 40-PQFN（6x6） |
| 包装： | 标准包装 |
| 其它名称： | FDMF6706CDKR |
PCB Layout Guidelines
Figure 24 provides an example of a proper layout for the
FDMF6706C and critical components. All of the high-
current paths, such as V IN , V SWH , V OUT , and GND
copper, should be short and wide for low inductance
and resistance. This technique aids in achieving a more
stable and evenly distributed current flow, along with
enhanced heat radiation and system performance.
The following guidelines are recommendations for the
PCB designer:
1. Input ceramic bypass capacitors must be placed
close to the VIN and PGND pins. This helps
reduce the high-current power loop inductance
and the input current ripple induced by the power
MOSFET switching operation.
2. The V SWH copper trace serves two purposes. In
addition to being the high-frequency current path
from the DrMOS package to the output inductor, it
also serves as a heat sink for the low-side
MOSFET in the DrMOS package. The trace
should be short and wide enough to present a low-
impedance path for the high-frequency, high-
current flow between the DrMOS and inductor to
minimize losses and temperature rise. Note that
the VSWH node is a high voltage and high-
frequency switching node with high noise
potential. Care should be taken to minimize
coupling to adjacent traces. Since this copper
trace also acts as a heat sink for the lower FET,
balance using the largest area possible to improve
DrMOS cooling while maintaining acceptable
noise emission.
3. An output inductor should be located close to the
FDMF6706C to minimize the power loss due to the
VSWH copper trace. Care should also be taken so
the inductor dissipation does not heat the DrMOS.
4. PowerTrench? MOSFETs are used in the output
stage. The Power MOSFETs are effective at
minimizing ringing due to fast switching. In most
cases, no VSWH snubber is required. If a snubber
is used, it should be placed close to the VSWH and
PGND pins. The resistor and capacitor need to be
of proper size for the power dissipation.
5. VCIN, VDRV, and BOOT capacitors should be
placed as close as possible to the VCIN to CGND,
VDRV to CGND, and BOOT to PHASE pins to
ensure clean and stable power. Routing width and
length should be considered as well.
6. Include a trace from PHASE to VSWH to improve
noise margin. Keep the trace as short as possible.
? 2011 Fairchild Semiconductor Corporation
FDMF6706C ? Rev. 1.0.3
15
7. The layout should include the option to insert a
small-value series boot resistor between the boot
capacitor and BOOT pin. The boot-loop size,
including R BOOT and C BOOT , should be as small as
possible. The boot resistor is normally not
required, but is effective at controlling the high-
side MOSFET turn-on slew rate. This can improve
noise operating margin in synchronous buck
designs that may have noise issues due to ground
bounce or high positive and negative VSWH
ringing. Inserting a boot resistance lowers the
DrMOS efficiency. Efficiency versus noise trade-
offs must be considered.
The VIN and PGND pins handle large current
transients with frequency components greater than
100 MHz. If possible, these pins should be
connected directly to the VIN and board GND
planes. The use of thermal relief traces in series
with these pins is discouraged since this adds
inductance to the power path. This added
inductance in series with either the VIN or PGND
pin degrades system noise immunity by increasing
positive and negative VSWH ringing.
8. CGND pad and PGND pins should be connected
by plane GND copper with multiple vias for stable
grounding. Poor grounding can create a noise
transient offset voltage level between CGND and
PGND. This could lead to faulty operation of gate
driver and MOSFET.
9. Ringing at the BOOT pin is most effectively
controlled by close placement of the boot
capacitor. Do not add an additional BOOT to the
PGND capacitor. This may lead to excess current
flow through the BOOT diode.
10. The SMOD# and DISB# pins have weak internal
pull-up and pull-down current sources,
respectively. These pins should not have any
noise filter capacitors. Do not to float these pins
unless absolutely necessary.
11. Use multiple vias on each copper area to
interconnect top, inner, and bottom layers to help
distribute current flow and heat conduction. Vias
should be relatively large and of reasonably low
inductance. Critical high-frequency components,
such as R BOOT , C BOOT , the RC snubber, and
bypass capacitors should be located as close to
the respective DrMOS module pins as possible
on the top layer of the PCB. If this is not feasible,
they should be connected from the backside
through a network of low-inductance vias.
www.fairchildsemi.com
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| FDMF6707B | 功能描述:功率驱动器IC XS DrMOS; Hi-Freq Hi-Perf Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6707C | 功能描述:功率驱动器IC Xtra-Small Hi-Perf Hi-Freq DrMOS Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6707V | 功能描述:功率驱动器IC Hi Performance, Hi Frequency DrMOS RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6708N | 功能描述:功率驱动器IC XS DrMOS Module Hi-Perf, Hi-Freq RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6730 | 功能描述:功率驱动器IC Plus Driver Multichip Modules RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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