参数资料
型号: FDMS3602S
厂商: Fairchild Semiconductor
文件页数: 8/15页
文件大小: 0K
描述: MOSFET N-CH 25V DUAL POWER56
标准包装: 1
系列: PowerTrench®
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 25V
电流 - 连续漏极(Id) @ 25° C: 15A,26A
开态Rds(最大)@ Id, Vgs @ 25° C: 5.6 毫欧 @ 15A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 27nC @ 10V
输入电容 (Ciss) @ Vds: 1680pF @ 13V
功率 - 最大: 1W
安装类型: 表面贴装
封装/外壳: 8-PowerTDFN
供应商设备封装: Power56
包装: 标准包装
其它名称: FDMS3602SDKR
Typical Characteristics (Q2 N-Channel) T J = 25°C unless otherwise noted
10
8
I D = 26 A
V DD = 10 V
10000
C iss
6
V DD = 13 V
1000
C oss
4
2
V DD = 16 V
100
f = 1 MHz
V GS = 0 V
C rss
0
0
10
20
30
40
50
50
0.1
1
10
25
R θ JC = 2 C/W
Q g , GATE CHARGE (nC)
Figure 20. Gate Charge Characteristics
50
T J = 25 o C
10
150
120
90
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 21. Capacitance vs Drain
to Source Voltage
o
V GS = 10 V
T J = 125 o C
T J
= 100 o C
60
30
V GS = 4.5 V
Limited by Package
1
0.01
0.1
1
10
100 300
0
25
50
75
100
125
150
T C , CASE TEMPERATURE ( C )
t AV , TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
o
Figure 23. Maximum Continuous Drain
Current vs Case Temperature
R θ JC = 2 C/W
200
100
10
100 μ s
1 ms
10000
1000
SINGLE PULSE
o
10 ms
THIS AREA IS
1
0.1
LIMITED BY r DS ( on )
SINGLE PULSE
T J = MAX RATED
R θ JA = 120 o C/W
100 ms
1s
10s
DC
100
10
T A = 25 o C
10
10
10
10
1
0.01
0.01
0.1 1 10
V DS , DRAIN to SOURCE VOLTAGE (V)
100200
1
-4
-3
-2 -1
t, PULSE WIDTH (sec)
10
100
1000
Figure 24. Forward Bias Safe
Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
?2011 Fairchild Semiconductor Corporation
FDMS3602S Rev.C5
8
www.fairchildsemi.com
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