参数资料
型号: FDMS8020
厂商: Fairchild Semiconductor
文件页数: 2/7页
文件大小: 0K
描述: MOSFET N-CH 30V 26A 8-PQFN
标准包装: 3,000
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 26A
开态Rds(最大)@ Id, Vgs @ 25° C: 2.5 毫欧 @ 26A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 61nC @ 10V
输入电容 (Ciss) @ Vds: 3800pF @ 15V
功率 - 最大: *
安装类型: 表面贴装
封装/外壳: 8-TDFN 裸露焊盘
供应商设备封装: 8-PQFN(5x6)
包装: 带卷 (TR)
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DSS
Δ T J
I DSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 24 V, V GS = 0 V
30
14
1
V
mV/°C
μ A
I GSS
Gate to Source Leakage Current, Forward V GS = 20 V, V DS = 0 V
100
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
1.0
1.5
-6
3.0
V
mV/°C
V GS = 10 V, I D = 26 A
2.0
2.5
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5 V, I D = 21.5 A
2.6
3.6
m Ω
V GS = 10 V, I D = 26 A, T J = 125 °C
2.9
3.7
g FS
Forward Transconductance
V DS = 5 V, I D = 26 A
154
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 15 V, V GS = 0 V,
f = 1 MHz
2855
1050
115
0.9
3800
1400
175
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
12
22
ns
t r
t d(off)
t f
Q g
Q g
Q gs
Q gd
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V DD = 15 V, I D = 26 A,
V GS = 10 V, R GEN = 6 Ω
V GS = 0 V to 10 V
V GS = 0 V to 4.5 V V DD = 15 V,
I D = 26 A
5.7
32
4
43
21
7.3
6.0
12
52
10
61
29
ns
ns
ns
nC
nC
nC
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0 V, I S = 2.1 A
V GS = 0 V, I S = 26 A
I F = 26 A, di/dt = 100 A/ μ s
I F = 26 A, di/dt = 300 A/ μ s
(Note 2)
(Note 2)
0.68
0.78
37
18
30
36
1.1
1.2
58
33
48
57
V
ns
nC
ns
nC
Notes :
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a) 50 °C/W when mounted on a
1 in 2 pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
3. Starting T J = 25 ° C; N-ch: L = 0.3 mH, I AS = 25 A, V DD = 27 V, V GS = 10 V.
4.As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
b) 125 °C/W when mounted on a
minimum pad of 2 oz copper.
?2011 Fairchild Semiconductor Corporation
FDMS8020 Rev. C
2
www.fairchildsemi.com
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