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| 型号： | FDMS86105 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 100V POWER56 |
| 标准包装： | 3,000 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 100V |
| 电流 - 连续漏极(Id) @ 25° C： | 6A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 34 毫欧 @ 6A，10V |
| Id 时的 Vgs(th)（最大）： | 4V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 11nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 645pF @ 50V |
| 功率 - 最大： | 2.5W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-PowerTDFN |
| 供应商设备封装： | Power56 |
| 包装： | 带卷 (TR) |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DSS
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 80 V, V GS = 0 V
V GS = ±20 V, V DS = 0 V
100
70
1
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th )
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
2.0
2.8
-9
4.0
V
mV/°C
V GS = 10 V, I D = 6 A
27
34
r DS(on)
Static Drain to Source On Resistance
V GS = 6 V, I D = 4.5 A
37
54
m Ω
V GS = 10 V, I D = 6 A, T J = 125 °C
46
57
g FS
Forward Transconductance
V DS = 10 V, I D = 6 A
15
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 50 V, V GS = 0 V,
f = 1 MHz
483
114
5
0.9
645
155
10
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
6.7
14
ns
t r
t d(off)
t f
Q g
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
V DD = 50 V, I D = 6 A,
V GS = 10 V, R GEN = 6 Ω
V GS = 0 V to 10 V
2.1
12
2.4
7.5
10
22
10
11
ns
ns
ns
nC
Q g
Q gs
Total Gate Charge
Gate to Source Charge
V GS = 0 V to 5 V
V DD = 50 V,
I D = 6 A
4.2
2.1
6
nC
nC
Q gd
Gate to Drain “Miller” Charge
1.7
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0 V, I S = 2 A
V GS = 0 V, I S = 6 A
I F = 6 A, di/dt = 100 A/ μ s
(Note 2)
(Note 2)
0.76
0.82
38
32
1.2
1.3
61
51
V
ns
nC
Notes :
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
3. Starting T J = 25 ° C, L = 1 mH, I AS = 10 A, V DD = 90 V, V GS = 10 V.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
?2011 Fairchild Semiconductor Corporation
FDMS86105 Rev.C
2
www.fairchildsemi.com
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