参数资料
型号: FDS6675BZ
厂商: Fairchild Optoelectronics Group
文件页数: 2/6页
文件大小: 0K
描述: MOSFET P-CH 30V 8-SOIC
产品变化通告: Mold Compound Change 12/Dec/2007
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 11A
开态Rds(最大)@ Id, Vgs @ 25° C: 13 毫欧 @ 11A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 62nC @ 10V
输入电容 (Ciss) @ Vds: 2470pF @ 15V
功率 - 最大: 1W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 标准包装
产品目录页面: 1603 (CN2011-ZH PDF)
其它名称: FDS6675BZDKR
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
B VDSS
? B VDSS
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = -250 μ A, V GS = 0V
I D = -250 μ A, referenced to
25°C
V DS = -24V, V GS = 0V
V GS = ±25V, V DS = 0V
-30
-20
-1
±10
V
mV /° C
μ A
μ A
On Characteristics (Note 2)
V GS(th)
? V GS(th)
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = -250 μ A
I D = -250 μ A, referenced to
25°C
-1
-2
15.7
-3
V
mV/°C
V GS = -10V , I D = -11A
10.8
13.0
r DS(on)
Drain to Source On Resistance
V GS = -4.5V, I D = -9A
V GS = -10V, I D = -11A
T J = 125 o C
17.4
15.0
21.8
18.8
m ?
g FS
Forward Transconductance
V DS = -5V,
I D = -11A
34
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = -15V, V GS = 0V,
f = 1MHz
1855
335
330
2470
450
500
pF
pF
pF
Switching Characteristics (Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q g
Q gs
Q gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain Charge
V DD = -15V, I D = -11A
V GS = -10V, R GS = 6 ?
V DS = -15V, V GS = -10V,
I D = -11A
V DS = -15V, V GS = -5V,
I D = -11A
3.0
7.8
120
60
44
25
7.2
11.4
10
16
200
100
62
35
ns
ns
ns
ns
nC
nC
nC
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage V GS = 0V, I S = -2.1A
-0.7
-1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = -11A, di/dt = 100A/ μ s
I F = -11A, di/dt = 100A/ μ s
42
30
ns
nC
Notes:
1: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user ’s board design.
a) 50 ° C/W when
mounted on a 1 in 2
pad of 2 oz copper
b)105 ° C/W when
mounted on a .04 in 2
pad of 2 oz copper
c) 125 ° C/W when
mounted on a
minimun pad
Scale 1 : 1 on letter size paper
2: Pulse Test:Pulse Width <300 us, Duty Cycle < 2.0%
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
?2009 Fairchild Semiconductor Corporation
FDS6675BZ Rev . B2
2
www.fairchildsemi.com
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