参数资料
型号: FDS6680A
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET N-CH 30V 12.5A 8-SOIC
产品培训模块: High Voltage Switches for Power Processing
SMPS Power Switch
产品变化通告: Mold Compound Change 12/Dec/2007
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 12.5A
开态Rds(最大)@ Id, Vgs @ 25° C: 9.5 毫欧 @ 12.5A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 23nC @ 5V
输入电容 (Ciss) @ Vds: 1620pF @ 15V
功率 - 最大: 1W
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 标准包装
产品目录页面: 1603 (CN2011-ZH PDF)
其它名称: FDS6680ADKR
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
V GS = 0 V,
I D = 250 μ A
30
V
? BV DSS
? T J
Breakdown Voltage Temperature
Coefficient
I D = 250 μ A, Referenced to 25 ° C
25
mV/ ° C
I DSS
Zero Gate Voltage Drain Current
V DS = 24 V,
V GS = 0 V
1
μ A
V DS = 24 V, V GS = 0 V, T J =55 ° C
10
μ A
I GSS
Gate–Body Leakage
V GS = ± 20 V,
V DS = 0 V
± 100
nA
On Characteristics
(Note 2)
V GS(th)
? V GS(th)
? T J
R DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
V DS = V GS , I D = 250 μ A
I D = 250 μ A, Referenced to 25 ° C
V GS = 10 V, I D = 12.5 A
1
2
–4.9
7.8
3
9.5
V
mV/ ° C
m ?
On–Resistance
V GS = 4.5 V, I D = 10.5 A
V GS = 10 V, I D = 12.5 A, T J =125 ° C
9.9
11.0
13
15
I D(on)
g FS
On–State Drain Current
Forward Transconductance
V GS = 10 V,
V DS = 15 V,
V DS = 5 V
I D = 12.5 A
25
64
A
S
Dynamic Characteristics
C iss
C oss
C rss
R G
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 15 V,
f = 1.0 MHz
V GS = 15 mV,
V GS = 0 V,
f = 1.0 MHz
1620
380
160
1.3
pF
pF
pF
?
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = 15 V,
V GS = 10 V,
V DS = 15 V,
V GS = 5 V
I D = 1 A,
R GEN = 6 ?
I D = 12.5 A,
10
5
27
15
16
5
19
10
43
27
23
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
5.8
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Sourc e Diode Forward Current
2.1
A
V SD
Drain–Source Diode Forward
Voltage
V GS = 0 V, I S = 2.1 A
(Note 2)
0.73
1.2
V
t rr
Q rr
Diode Reverse Recovery Time I F = 12.5 A, d iF /d t = 100 A/μs
Diode Reverse Recovery Charge
28
18
ns
nC
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a) 50°C/W when
mounted on a 1in
2
b) 105°C/W when
mounted on a .04 in 2
c) 125°C/W when mounted
on a minimum pad.
pad of 2 oz copper
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%
FDS6680A Rev F2(W)
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