参数资料
型号: FMS2704LT1C
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封装: TSSOP-24
文件页数: 13/39页
文件大小: 173K
代理商: FMS2704LT1C
PRODUCT SPECIFICATION
FMS2704/FMS2704L
20
REV. 1.01 12/2/99
Default response of the Temperature Processor is set to match
the expected characteristics of the Intel Pentium thermal diode
and the on-chip local diode. By updating the values in the
TRSENS, TRSO, TLSENS and TLOS registers sensitivity can
be trimmed to accommodate alternate thermal diode charac-
teristics.
Diode low current voltage value VLO is subtracted from the
high current value VHI to yield TK = VD . TK is the digitized
temperature in °K with a sensitivity of 1/2 °/lsb.
Next, the value 273.2 is subtracted to transform TK from °K to
°C. Diode offsets are trimmed out by adjusting the value of
NOS. TC is truncated to 8-bits prior to storage in the tempera-
ture registers.
To minimize the effects of noise, digitized temperatures are
averaged over several samples.
THERM Processing
THERM is a bi-directional pin with an open drain output.
When the THERM output is asserted L, the THERM input
is disabled.
Local temperatures are compared against:
1.
TLHI7-0 and TLLO7-0 values stored in the Limit Registers
which bracket the temperature range to be tracked. If a
limit is violated, INT = L.
2.
Thermal trip points PTL7-0 or FTL7-0 set at high levels
corresponding to a serious overheating problem.
Remote temperatures, TR1 and TR2 are compared against:
1.
TR1HI7-0, TR1LO7-0 TR2HI7-0 and TR2LO7-0 values
stored in the Limit Registers which bracket the tempera-
ture range to be tracked. If a limit is violated, INT = L.
2.
Thermal Trip points FTR7-0 or PTR7-0. If TR7-0 >
FTR7-0 or PTR7-0, the alert output THERM = asserted.
Following a violation, the sensed temperature must drop
5°C to clear the trip ag.
Figure 4 depicts the logical ow of the internal and external
THERM signals, showing the origins and destinations.
Figure 4. THERM I/O Structure/Detail
Interrupt
Status
Register
Interrupt
Status
Register
Mirror
Mask
Gating
Configuration
Register
THERM
FAN_OFF
INT
Interrupt
Mask
Register
ITHERM
THERM
Comparators
FRY7-0
HOT7-0
D/A
Converter
FAN_SPD
D/A
Register
FAN_ON
THERM
Interrupt
OR-gate
Programmable
Trip Point
Registers
Fixed Trip
Point
Registers
FHOT7-0
FFRY7-0
PFRY7-0
PHOT7-0
XTHERM
MSKTHERM
Other
Interrupts
TRIPLOCK
ITHERM
Restore
DACFF==THERM
INTRSTb
TEMPVALID
TA[7:0]
TR[7:0]
As an input, if THERM = L the following events occur:
1.
If the mask bit, MSKTHERM = L, output pin, INT = L
2.
Conguration Register bit, FAN_OFF = H.
3.
Output pins, FAN_SPDA,B = 2.5V for maximum fan
speed, with register values SPEEDA7-0 and SPEEDB7-0
unchanged.
4.
Interrupt Status Register bit, THERM = H.
5.
Interrupt Status Register Mirror bit, MTHERM = H.
As an output, ITHERM = H, causes THERM = L; ITHERM
= L, causes THERM = Z, open drain. ITHERM = H, if any of
the following conditions occur:
1.
If Conguration Register bit, TRIPLOCK = L:
a) TL7-0 > FTL7-0.
b) TR17-0 > FTR7-0.
c) TR27-0 > FTR7-0.
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