参数资料
型号: FT232HL-REEL
厂商: FTDI, Future Technology Devices International Ltd
文件页数: 3/65页
文件大小: 0K
描述: IC HS USB TO UART/FIFO 48LQFP
应用说明: FT1248 Application Note
标准包装: 1
通道数: 1,UART
FIFO's: 4kb
规程: RS232,RS422,RS485
电源电压: 1.62 V ~ 1.98 V,2.97 V ~ 3.63 V
带并行端口:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 标准包装
其它名称: 768-1101-6
Copyright 2012 Future Technology Devices International Limited
11
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
Pin No.
Name
Type
Description
45
EECS
I/O
EEPROM – Chip Select. Tri-State during device reset.
44
EECLK
OUTPUT
Clock signal to EEPROM. Tri-State during device reset. When not in reset, this
outputs the EEPROM clock.
43
EEDATA
I/O
EEPROM – Data I/O. Connect directly to Data-in of the EEPROM and to Data-out
of the EEPROM via a 2.2K resistor. Also, pull Data-Out of the EEPROM to VCCD
via a 10K resistor for correct operation. Tri-State during device reset.
Table 3.3 EEPROM Interface Group
Pin No.
Name
Type
Description
13
ADBUS0
Output
Configurable Output Pin, the default configuration is Transmit Asynchronous Data
Output.
14
ADBUS1
Input
Configurable Input Pin, the default configuration is Receiving Asynchronous Data
Input.
15
ADBUS2
Output
Configurable Output Pin, the default configuration is Request to Send Control
Output / Handshake Signal.
16
ADBUS3
Input
Configurable Input Pin, the default configuration is Clear To Send Control Input /
Handshake Signal.
17
ADBUS4
Output
Configurable Output Pin, the default configuration is Data Terminal Ready Control
Output / Handshake Signal.
18
ADBUS5
Input
Configurable Input Pin, the default configuration is Data Set Ready Control Input /
Handshake Signal.
19
ADBUS6
Input
Configurable Input Pin, the default configuration is Data Carrier Detect Control
Input.
20
ADBUS7
Input
Configurable Input Pin, the default configuration is Ring Indicator Control Input.
When remote wake up is enabled in the EEPROM taking RI# low can be used to
resume the PC USB host controller from suspend. (Also see note 1, 2, 3 in section
21
ACBUS0
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
25
ACBUS1
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
26
ACBUS2
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
27
ACBUS3
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
28
ACBUS4
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
29
ACBUS5
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
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