
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
12
F
USB2
8
0
5
—
USB2
.0
High
-S
pee
d
OTG
Tra
nsc
e
iv
e
rw
ith
UL
P
I
Inter
fac
e
USB State Transitions
A high-speed USB host or On-The-Go (OTG) device
handles more than one electrical state, as defined in the
USB
and
OTG
specifications.
The
FUSB2805
accommodates the various states through the register
bit settings of XcvrSelect, TermSelect, OpMode[1:0],
DpPulldown, and DmPulldown.
Table 4 summarizes the
operating states.
Table 4.
Operating States and Corresponding Resistor Settings
Signaling Mode
Register Settings
Internal Resistor Settings
X
cv
rS
ele
ct
[1:0]
T
er
mSe
lec
t
O
p
Mod
e
[1:0]
Dp
P
u
lldo
w
n
Dm
P
u
lldo
w
n
rp
u
_dp
_e
n
rp
u
_dm
_e
n
rp
d
_dp
_e
n
rp
d
_dm
_e
n
h
sterm_e
n
General Settings
Three-State Drivers
XXb
Xb
01b
Xb
0b
Power-up or VBUS < Vth (SESS_END)
01b
0b
00b
1b
0b
1b
0b
Host Settings
Host Chirp
00b
0b
10b
1b
0b
1b
Host High Speed
00b
0b
00b
1b
0b
1b
Host Full Speed
X1b
1b
00b
1b
0b
1b
0b
Host HS/FS Suspend
01b
1b
00b
1b
0b
1b
0b
Host HS/FS Resume
01b
1b
10b
1b
0b
1b
0b
Host Low Speed
10b
1b
00b
1b
0b
1b
0b
Host Low Speed Suspend
10b
1b
00b
1b
0b
1b
0b
Host Low Speed Resume
10b
1b
10b
1b
0b
1b
0b
Host Test_J/Test_K
00b
0b
10b
1b
0b
1b
Peripheral Settings
Peripheral Chirp
00b
1b
10b
0b
1b
0b
Peripheral High Speed
00b
0b
00b
0b
1b
Peripheral Full Speed
01b
1b
00b
0b
1b
0b
Peripheral HS/FS Suspend
01b
1b
00b
0b
1b
0b
Peripheral HS/FS Resume
01b
1b
10b
0b
1b
0b
Peripheral Test_J/Test_K
00b
0b
10b
0b
1b
OTG Device, Peripheral Chirp
00b
1b
10b
0b
1b
0b
1b
0b
OTG Device, Peripheral High Speed
00b
0b
00b
0b
1b
0b
1b
OTG Device, Peripheral Full Speed
01b
1b
00b
0b
1b
0b
1b
0b
OTG Device, Peripheral HS/FS Suspend
01b
1b
00b
0b
1b
0b
1b
0b
OTG Device Peripheral, HS/FS Resume
01b
1b
10b
0b
1b
0b
1b
0b
OTG Device Peripheral, Test_J/Test_K
00b
0b
10b
0b
1b
0b
1b