
Section 7 DMA Controller
Rev. 4.00 Jan 26, 2006 page 248 of 938
REJ09B0276-0400
7.4.7
DMAC Activation
The DMAC can be activated by an internal interrupt, external request, or auto-request. The
available activation sources differ depending on the transfer mode and channel as indicated in
table 7.11.
Table 7.11
DMAC Activation Sources
Short Address Mode
Channels
Full Address Mode
Activation Source
0A and 1A
0B and 1B
Normal
Block
Internal
IMIA0
!!
×
!
interrupts
IMIA1
!!
×
!
IMIA2
!!
×
!
ADI
!!
×
!
TXI0
!!
××
RXI0
!!
××
External
requests
Falling edge
of
DREQ
×
!!!
Low input at
DREQ
×
!!
×
Auto-request
××
!
×
Activation by Internal Interrupts: When an interrupt request is selected as a DMAC activation
source and the DTE bit is set to 1, that interrupt request is not sent to the CPU. It is not possible
for an interrupt request to activate the DMAC and simultaneously generate a CPU interrupt.
When the DMAC is activated by an interrupt request, the interrupt request flag is cleared
automatically. If the same interrupt is selected to activate two or more channels, the interrupt
request flag is cleared when the highest-priority channel is activated, but the transfer request is
held pending on the other channels in the DMAC, which are activated in their priority order.
Activation by External Request: If an external request (
DREQ pin) is selected as an activation
source, the
DREQ pin becomes an input pin and the corresponding TEND pin becomes an output
pin, regardless of the port data direction register (DDR) settings. The
DREQ input can be level-
sensitive or edge-sensitive.
In short address mode and normal mode, an external request operates as follows. If edge sensing is
selected, one byte or word is transferred each time a high-to-low transition of the
DREQ input is
detected. If the next edge is input before the transfer is completed, the next transfer may not be