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| 型号： | HFA3861AIN96 |
| 厂商： | INTERSIL CORP |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | Circular Connector; No. of Contacts:21; Series:MS27473; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:22-21 RoHS Compliant: No |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP64 |
| 封装： | 10 X 10 MM, PLASTIC, MS-026ACD, TQFP-64 |
| 文件页数： | 20/37页 |
| 文件大小： | 440K |
| 代理商： | HFA3861AIN96 |
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20
Clock Offset Tracking Performance
The PRISM baseband processor is designed to accept data
clock offsets of up to
±
25ppm for each end of the link (TX
and RX). This effects both the acquisition and the tracking
performance of the demodulator. The budget for clock offset
error is 0.75dB at
±
50ppm. No appreciable degradation was
seen for operation in AWGN at
±
50ppm.
Carrier Offset Frequency Performance
The correlators used for acquisition for all modes and for
demodulation in the 1 and 2Mbps modes are time invariant
matched filter correlators otherwise known as parallel
correlators. They use two samples per chip and are tapped
at every other shift register stage. Their performance with
carrier frequency offsets is determined by the phase roll rate
due to the offset. For an offset of +50ppm (combined for both
TX and RX) will cause the carrier to phase roll 22.5 degrees
over the length of the correlator. This causes a loss of
0.22dB in correlation magnitude which translates directly to
Eb/N0 performance loss. In the PRISM chip design, the
carrier phase locked loop is inactive during acquisition.
During tracking, the carrier tracking loop corrects for offset,
so that no degradation is noted. In the presence of high
multipath and high SNR, however, some degradation is
expected.
FIGURE 14. BER vs Eb/N0 PERFORMANCE FOR PSK MODES
FIGURE 15. BER vs Eb/N0 PERFORMANCE FOR CCK MODES
7
8
9
10
11
12
Eb/N0
1.E+00
B
1.E-03
1.E-04
1.E-05
1.E-07
1.E-08
1.E-02
1.E-06
1.E-01
BER 1.0
BER 2.0
THY 1, 2
14
13
12
11
10
9
8
7
6
5
B
Eb/N0
1.E+00
1.E-03
1.E-04
1.E-05
1.E-07
1.E-08
1.E-02
1.E-06
1.E-01
1.E-09
BER 11
BER 5.5
THY 5.5
THY 11
HFA3861A
相关PDF资料 |
PDF描述 |
|---|---|
| HFA3861AIN | 288 MACROCELL 3.3 VOLT ISP CPLD |
| HFA3863IN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863IN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863 | Direct Sequence Spread Spectrum Baseband Processor(直接序列扩谱基带处理器) |
| HFA3983IV96 | 2.4GHz Power Amplifier and Detector |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HFA3861B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861IV | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861IV96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
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