参数资料
| 型号： | HI5860IBZ-T |
| 厂商： | Intersil |
| 文件页数： | 7/12页 |
| 文件大小： | 0K |
| 描述： | CONV D/A 12BIT 130MSPS 28-SOIC |
| 标准包装： | 1 |
| 设置时间： | 35ns |
| 位数： | 12 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 200mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 剪切带 (CT) |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 130M |
| 其它名称： | HI5860IBZ-TCT |
4
FN4654.7
February 6, 2008
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D11-D0, CLK, SLEEP) . . . . . . . DVDD + 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AVDD + 0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Resistance (Typical, Note 1)
θJA(°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AVDD = DVDD = +5V (except where otherwise noted), VREF = Internal 1.2V, IOUTFS = 20mA,
TA = -40°C to +85°C, TA = +25°C for All Typical Values.
PARAMETER
TEST CONDITIONS
MIN
(Note10)
TYP
MAX
(Note 10)
UNITS
SYSTEM PERFORMANCE
Resolution
12
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 8)
-2.0
±0.5
+2.0
LSB
Differential Linearity Error, DNL
(Note 8)
-1.0
±0.5
+1.0
LSB
Offset Error, IOS
(Note 8)
-0.025
-
+0.025
% FSR
Offset Drift Coefficient
(Note 8)
-
0.1
-
ppm
FSR/°C
Full Scale Gain Error, FSE
With External Reference (Notes 2, 8)
-10
±2
+10
% FSR
With Internal Reference (Notes 2, 8)
-10
±1
+10
% FSR
Full Scale Gain Drift
With External Reference (Note 8)
-
±50
-
ppm
FSR/°C
With Internal Reference (Note 8)
-
±100
-
ppm
FSR/°C
Full Scale Output Current, IFS
2
-
20
mA
Output Voltage Compliance Range
(Notes 3, 8)
-0.3
-
1.25
V
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, fCLK
(Note 3)
130
-
MHz
Output Settling Time, (tSETT)
±0.05% (±2 LSB) (Note 8)
-
35
-
ns
Singlet Glitch Area (Peak Glitch)
-
5
-
pVs
Output Rise Time
Full Scale Step
-
2.5
-
ns
Output Fall Time
Full Scale Step
-
2.5
-
ns
Output Capacitance
-
10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√Hz
IOUTFS = 2mA
-
30
-
pA/
√Hz
HI5860
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