参数资料
型号: HIP1012EVAL1
厂商: Intersil
文件页数: 1/15页
文件大小: 0K
描述: EVALUATION BOARD DUAL GENERIC
标准包装: 1
主要目的: 电源管理,热交换控制器
已用 IC / 零件: HIP1012
已供物品:
?
HIP1012A
Data Sheet
March 2004
FN4419.6
Dual Power Distribution Controller
The HIP1012A is a HOT SWAP dual supply power distribution
controller. Two external N-Channel MOSFETs are driven to
distribute power while providing load fault isolation.
At turn-on, the gate of each external N-Channel MOSFET is
charged with a 10 μ A current source. Capacitors on each
gate (see the Typical Application Diagram), create a
programmable ramp (soft turn-on) to control inrush currents.
A built in charge pump supplies the gate drive for the 12V
supply N-Channel MOSFET switch.
Overcurrent protection is facilitated by two external current
sense resistors. When the current through either resistor
exceeds the user programmed value the controller enters the
current regulation mode. The time-out capacitor, C TIM , starts
charging as the controller enters the time out period. Once
C TIM charges to a 2V threshold, the N-Channel MOSFETs are
latched off. In the event of a fault at least three times the
current limit level, the N-Channel MOSFET gates are pulled
low immediately before entering time out period. The
controller is reset by a rising edge on either PWRON pin.
Choosing the voltage selection mode the HIP1012 controls
either +12V/5V or +3.3V/+5V supplies.
Ordering Information
Features
? HOT SWAP Dual Power Distribution Control for +5V and
+12V or +5V and +3.3V
? Provides Fault Isolation
? Programmable Current Regulation Level
? Programmable Time Out
? Charge Pump Allows the Use of N-Channel MOSFETs
? Power Good and Overcurrent Latch Indicators
? Enhanced Overcurrent Sensitivity Available
? Redundant Power On Controls
? Adjustable Turn-On Ramp
? Protection During Turn-On
? Two Levels of Current Limit Detection Provide Fast
Response to Varying Fault Conditions
? Less Than 1 μ s Response Time to Dead Short
? 3 μ s Response Time to 200% Current Overshoot
? Pb-Free Package Option
? Tape & Reel Packaging with ‘-T’ Part Number Suffix
Applications
PART NUMBER
HIP1012ACB
TEMP.
RANGE (°C)
-0 to 70
PACKAGE
14 Ld SOIC
PKG.
DWG. #
M14.15
? Redundant Array of Independent Disks (RAID) System
? Power Distribution Control
HIP1012ACBZA (Note)
-0 to 70
14 Ld SOIC( Pb-free) M14.15
? Hot Plug, Hot Swap Components
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Pinout
HIP1012A (SOIC)
Typical Application Diagram
TOP VIEW
C PUMP
V DD
C PUMP
3/12VS
3/12VG
V DD
MODE/
PWRON1
PWRON2
5VG
5VS
1
2
3
4
5
6
7
14 3/12VISEN
13 R ILIM
12 GND
11 C PUMP
10 C TIM
9 PGOOD
8 5VISEN
OPTIONAL
V DD R FILTER
C FILTER
12V
5V
R GATE
C GATE
POWER ON
INPUTS
R GATE
R SENSE
HIP1012A
3/12VS 3/12VISEN
3/12VG R ILIM
GND
M/PON1
PWRON2 C TIM
5VG PGOOD
5VS 5ISEN
R LOAD
R ILIM
C TIM
5V OR 3.3V
C GATE
R SENSE
R LOAD
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright ? Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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