参数资料
型号: HIP6301VCB
厂商: Intersil
文件页数: 5/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 20-SOIC
标准包装: 38
PWM 型: 控制器
输出数: 4
频率 - 最大: 336kHz
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 管件
HIP6301V, HIP6302V
HIP6301V and HIP6302V Functional Pin Descriptions
HIP6301V
(20 LD SOIC
TOP VIEW
HIP6302V
(16 LD SOIC
TOP VIEW
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
20 V CC
19 PGOOD
18 PWM4
17 ISEN4
16 ISEN1
15 PWM1
14 PWM2
13 ISEN2
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
16 V CC
15 PGOOD
14 ISEN1
13 PWM1
12 PWM2
11 ISEN2
10 VSEN
9 GND
GND 9
VSEN 10
VID4, VID3, VID2, VID1 and VID0
(Pins 1 thru 5 - Both Parts)
12 ISEN3
11 PWM3
PWM1 (Pin 15 - HIP6301V, Pin 13 - HIP6302V),
PWM2 (Pin 14 - HIP6301V, Pin 12 - HIP6302V),
Voltage Identification inputs. The HIP6301V and HIP6302V
decode the VID bits to establish the reference voltage (see
Table 1). Each pin has an internal 20μA pull-up current source
to 2.5V making the parts compatible with CMOS and TTL
logic from 5V down to 2.5V. When a VID change is detected,
the reference voltage slowly ramps up or down to the new
value in 25mV steps. VID input levels above 2.9V may
produce an reference-voltage offset inaccuracy.
COMP (Pin 6 - Both Parts)
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
FB (Pin 7 - Both Parts)
Inverting input of the internal error amplifier.
FS/DIS (Pin 8 - Both Parts)
Channel frequency, F SW , select and disable. A resistor from
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.
GND (Pin 9 - Both Parts)
Bias and reference ground. All signals are referenced to this
pin.
VSEN (Pin 10 - Both Parts)
Power-good monitor input. Connect to the microprocessor CORE
voltage.
5
PWM3 (Pin 11 - HIP6301V only) and PWM4
(Pin 18 - HIP6301V only)
PWM outputs for each channel. Connect these pins to the
PWM input of the external MOSFET driver. For HIP6301V
systems using 3 channels, connect PWM4 high. For two
channel systems, connect PWM3 and PWM4 high.
ISEN1 (Pin 16 - HIP6301V, Pin 14 - HIP6302V),
ISEN2 (Pin 13 - HIP6301V, Pin 11 - HIP6302V),
ISEN3 (Pin 12 - HIP6301V only) and ISEN4
(Pin 17 - HIP6301V only)
Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.
PGOOD (Pin 19 - HIP6301V, Pin 15 - HIP6302V)
Power-good. This pin is an open-drain logic signal that
indicates when the microprocessor CORE voltage (VSEN
pin) is within specified limits and soft-start has timed out.
V CC (Pin 20 - HIP6301V, Pin 16 - HIP6302V)
Bias supply. Connect this pin to a 5V supply.
FN9034.3
May 5, 2008
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