参数资料
型号: HIP6301VCB
厂商: Intersil
文件页数: 8/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 20-SOIC
标准包装: 38
PWM 型: 控制器
输出数: 4
频率 - 最大: 336kHz
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 管件
HIP6301V, HIP6302V
RIN
FB
VIN
ERROR
AMPLIFIER
COMPARATOR
Q1
L01
-
+
CORRECTION
+
-
-
+
PWM
CIRCUIT
PWM1
HIP6601B
Q2
IL1
DAC
PROGRAMMABLE
PHASE
REFERENCE
+
CURRENT
SENSING
ISEN1
RISEN1
-
I AVERAGE
CURRENT
AVERAGING
VCORE
-
COUT
RLOAD
+
CURRENT
SENSING
ISEN2
RISEN2
VIN
PHASE
-
+
CORRECTION
+
-
COMPARATOR
PWM
CIRCUIT
PWM2
HIP6601B
Q3
L02
IL2
Q4
FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE HIP6301V VOLTAGE AND CURRENT CONTROL LOOPS FOR 2-PHASE REGULATOR
Operation
Figure 1 shows a simplified diagram of the voltage regulation
and current control loops. Both voltage and current feedback
are used to precisely regulate voltage and tightly control the
output currents, I L1 and I L2 , of the two power channels. The
voltage loop comprises the error amplifier, comparators, gate
drivers and output MOSFETs. The error amplifier is
essentially connected as a voltage follower that has as an
input, the programmable reference DAC and an output that
is the CORE voltage.
Voltage Loop
Feedback from the CORE voltage is applied via resistor R IN
to the inverting input of the error amplifier. This signal can
drive the error amplifier output either high or low, depending
upon the CORE voltage. Low CORE voltage makes the
amplifier output move towards a higher output voltage level.
Amplifier output voltage is applied to the positive inputs of
the comparators via the correction summing networks.
Out-of-phase sawtooth signals are applied to the two
Comparators inverting inputs. Increasing error amplifier
voltage results in increased comparator output duty cycle.
This increased duty cycle signal is passed through the PWM
8
CIRCUIT with no phase reversal and on to the HIP6601B,
again with no phase reversal for gate drive to the upper
MOSFETs, Q 1 and Q 3 . Increased duty cycle or ON-time for
the MOSFET transistors results in increased output voltage
to compensate for the low output voltage sensed.
Current Loop
The current control loop works in a similar fashion to the
voltage control loop, but with current control information
applied individually to each channel’s comparator. The
information used for this control is the voltage that is
developed across r DS(ON) of the lower MOSFETs, Q 2 and
Q 4 , when they are conducting. A single resistor converts and
scales the voltage across the MOSFETs to a current that is
applied to the current sensing circuit within the controller.
Output from these sensing circuits is applied to the current
averaging circuit. Each PWM channel receives the
difference signal from the summing circuit that compares the
average sensed current to the individual channel current.
When a power channel’s current is greater than the average
current, the signal applied via the summing correction circuit
to the comparator, reduces the output pulse width of the
comparator to compensate for the detected “above average”
current in that channel.
FN9034.3
May 5, 2008
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