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型号： HW-V5-ML561-UNI-G-J
厂商： Xilinx Inc
文件页数： 90/91页
文件大小： 0K
描述： EVALUATION PLATFORM VIRTEX-5
产品变化通告： Development Systems Discontinuation 16/Jan/2012
标准包装： 1
系列： Virtex®-5 LXT
类型： FPGA
适用于相关产品： XC5VLX50T-FFG1136
所含物品： 评估平台，线缆，CD，小型闪存卡，DDR2 DIMM，- 不包括电源 -
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
90
03/31/08
4.0
Added XC5VFX30T, XC5VFX70T, XC5VFX100T, XC5VFX130T, XC5VFX200T devices to appropriate
tables.
Updated Power-On Power Supply Requirements, page 6.
Added GTX_DUAL Tile Specifications and PowerPC 440 Switching Characteristicssections.
Corrected MGTAVCC in Table 24, page 13.
Updated MGTRREF in Table 26, page 13.
Changed the symbol names to FGTPTX in Table 34 and FGTPRX in Table 35.
Moved the CRC Block Switching Characteristics to Table48, page25.
Added notes to Table 53.
Revised speed specification version to 1.59.
04/25/08
4.1
Added XC5VSX240T to appropriate tables.
Clarified maximum frequency descriptions in Table 68, page 47.
Added Maximum Readback Frequency (FRBCCK) to SelectMAP Mode Programming Switching in
Table 70.
Revised speed specification version to 1.60.
05/09/08
4.2
Revised Ethernet MAC Switching Characteristics and added Endpoint Block for PCI Express Designs
Switching Characteristics.
Revised some VMEAS values and added note 6 to Table58, page37. Added Figure 12, page 38 to
Output Delay Measurements. Revised some VMEAS and RREF values and added note 4 to Table 59,
page 38.
Reversed the order of the setup/hold values for TPLLCCK_REL/TPLLCKC_REL in Table75, page56.
Added Package Skew values to Table 99, page 84.
05/15/08
4.3
Revised Table12, page9.
06/12/08
4.4
Added values to some devices in Table 4.
Increased the maximum VIN in Table 28, page 14.
Revised VIDIFF and VISE in Table 29, Figure 3, and Figure 4, page 15. Same change for GTX
transceivers in Table 41, Figure 8, and Figure 9, page 21.
Added values to Table 43.
Updated Table 54 and Table 55 with production status on some devices.
In Table 71, revised TBCCK0_0, TBGCK0_0. In Table 73, revised TBRCKO_O, and TBRCKO_O_BYP.
Revised XC5VLX20T, XC5VLX155, XC5VLX155T, XC5VFX30T, XC5VFX70T, XC5VFX100T,
XC5VFX130T, and some XC5VSX240T values in Table 84 through Table 98.
06/18/08
4.5
Added values to Table 5.
06/26/08
4.6
Added values to Table 5.
Moved XC5VLX20T to production in Table 54 and Table 55.
Updated the FOUTMAX in Table 74.
09/23/08
4.7
Added XC5VTX150T and XC5VTX240T devices to appropriate tables.
Added values to Table 4 and Table 5.
Updated data in Table 38, Table 39, Table 40, Table 41, Table 42, Table 44, Table 45, Table 46, and
Table 47.
Moved XC5VLX20T to production in Table 54 and Table 55.
Added note 8 to Table 68, page 47.
Added note 1 to Table 74, page 55.
Date
Version
Revision
相关PDF资料
PDF描述
HW-V5-ML550-UNI-G-J EVALUATION PLATFORM VIRTEX-5
HW-V5-ML525-UNI-G-J EVAL PLATFORM ROCKET IO VIRTEX-5
STD21W-F WIRE & CABLE MARKERS
XE8000EV120 BOARD EVAL FOR SX8722I070TRLF
AD923011-200EBZ BOARD EVAL FOR AD9230 200MSPS
相关代理商/技术参数
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HW-VID-KIT 功能描述:可编程逻辑 IC 开发工具 Lattice Video Interface Kit RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
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HW-VL2 制造商:IDEC Corporation 功能描述:COVER;HW FNGR SAFE CONTAC CVR 制造商:IDEC CORPORATION 功能描述:HW FNGR SAFE CONTAC CVR
HW-VL3 制造商:IDEC Corporation 功能描述: 制造商:IDEC Corporation 功能描述:Replacs TW-VL3 FNGR SAF
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