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参数资料
| 型号： | HY29LV320TF-90 |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | DRAM |
| 英文描述： | 32 Mbit (2M x 16) Low Voltage Flash Memory |
| 中文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PBGA63 |
| 封装： | 7 X 11 MM, FBGA-63 |
| 文件页数： | 9/44页 |
| 文件大小： | 323K |
| 代理商： | HY29LV320TF-90 |
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9
r1.3/May 02
HY29LV320
Table 3. HY29LV320 Secure Sector Addressing
o
t
e
S
o
W
(
T
0
2
3
V
L
9
2
Y
H
2
1
B
0
2
3
V
L
9
2
Y
H
2
1
Notes:
1. Accesses within the specified sector, but outside the specified address range, may produce indeterminate results.
2.
‘
0xN. . . N
’
indicates an address in hexadecimal notation. The address range is A[20:0].
Sec
2
NOT Programmed or Protected at the Factory
If the security feature is not required, the Sec
2
can
be treated as an additional Flash memory space
of 128 words. The Sec
2
can be read, programmed,
and erased as often as required. The Sec
2
area
can be protected using the following procedure:
Write the three-cycle Enter Secure Sector Re-
gion command sequence.
Follow the in-system sector protect algorithm
as shown in Figure 3, except that RESET# may
be at either V
IH
or V
ID
. This allows in-system pro-
tection of the Secure Sector without raising any
device pin to a high voltage. Note that this
method is only applicable to the Secure Sector.
Once the Secure Sector is locked and verified,
the system must write the Exit Secure Sector
command sequence to return to reading and
writing the remainder of the array.
Sec
2
protection must be used with caution since,
once protected, there is no procedure available
for unprotecting the Sec
2
area and none of the
bits in the Sec
2
memory space can be modified in
any way.
e
c
e
D
e
z
)
d
r
8
8
S
r
r
o
t
e
S
d
e
c
a
p
e
R
1
e
g
n
a
R
s
s
e
r
d
d
A
2
r
e
b
m
2
u
e
E
0
N
g
F
0
l
e
R
s
0
-
0
-
0
S
s
0
0
c
n
r
d
0
E
0
0
0
o
d
F
0
x
r
A
1
x
0
0
e
E
n
1
0
a
x
x
e
)
)
e
a
T
(
e
a
T
(
6
6
S
S
F
F
7
7
0
0
E
0
F
0
1
0
x
x
0
0
-
-
0
0
0
0
0
0
E
0
F
0
1
0
x
x
0
0
7
7
0
0
0
0
0
0
BUS OPERATIONS
Device bus operations are initiated through the
internal command register, which consists of sets
of latches that store the commands, along with
the address and data information, if any, needed
to execute the specific command. The command
register itself does not occupy any addressable
memory location. The contents of the command
register serve as inputs to an internal state ma-
chine whose outputs control the operation of the
device.
Table 4 lists the normal bus operations, the inputs
and control levels they require, and the resulting
outputs. Certain bus operations require a high
voltage on one or more device pins. Those are
described in Table 5.
Data is read from the HY29LV320 by using stan-
dard microprocessor read cycles while placing the
word address on the device
’
s address inputs. The
host system must drive the CE# and OE# pins
LOW and drive WE# high for a valid read opera-
tion to take place. See Figure 1.
The HY29LV320 is automatically set for reading
array data after device power-up and after a hard-
ware reset to ensure that no spurious alteration of
the memory content occurs during the power tran-
sition. No command is necessary in this mode to
obtain array data, and the device remains enabled
for read accesses until the command register con-
tents are altered.
This device features an Erase Suspend mode.
While in this mode, the host may read the array
data from any sector of memory that is not marked
for erasure. If the host reads from an address
within an erase-suspended (or erasing) sector, or
while the device is performing a program opera-
tion, the device outputs status data instead of ar-
ray data. After completing an Automatic Program
or Erase algorithm within a sector, that sector au-
tomatically returns to the read array data mode.
After completing a programming operation in the
Erase Suspend mode, the system may once again
read array data with the same exception noted
above.
The host must issue a hardware reset or the soft-
ware reset command to return a sector to the read
array data mode if DQ[5] goes high during a pro-
gram or erase cycle, or to return the device to the
read array data mode while it is in the Electronic
ID mode.
相关PDF资料 |
PDF描述 |
|---|---|
| HY29LV320BF-12 | Dust Cover; For Use With:Anderson Power SB350 Series Connectors; Color:Red |
| HY29LV320BF-12I | 32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TT-90 | 32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320BT-90 | 32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TF-70 | 32 Mbit (2M x 16) Low Voltage Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HY29LV320TF-90I | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TT-12 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TT-12I | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TT-70 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
| HY29LV320TT-70I | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:32 Mbit (2M x 16) Low Voltage Flash Memory |
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