参数资料
型号: HY5V28CLF-S
厂商: HYNIX SEMICONDUCTOR INC
元件分类: DRAM
英文描述: 16M X 8 SYNCHRONOUS DRAM, 6 ns, PBGA54
封装: 8.30 X 10.50 MM, 0.80 MM PITCH, FBGA-54
文件页数: 5/14页
文件大小: 128K
代理商: HY5V28CLF-S
HY5V28C(L)F
Rev. 0.1/Sep.01
14
COMMAND TRUTH TABLE
Note :
1. OP Code : Operand Code
2. V = Valid, X = Dont care, H = Logic High, L= Logic Low, RA = Row Address, CA = Column Address.
3. The burst read sigle write mode is entered by programming the write burst mode bit (A9) in the mode register to a logic 1.
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
L
X
OP code
1
No Operation
H
X
HX
X
XX
L
HHH
Bank Active
H
X
L
H
X
RA
V
Read
HX
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
HX
L
H
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
HX
L
H
L
X
HX
Precharge selected Bank
LV
Burst Stop
H
X
L
H
L
X
DQM
H
X
V
X
Auto Refresh
H
L
H
X
Burst-Read-Single-
WRITE
H
X
L
LLL
X
A9 Ball High
(Other Balls OP code)
MRS
Mode
Self Refresh
Entry
H
L
H
X
Exit
L
H
HX
X
L
HHH
Precharge
power down
Entry
H
L
HX
X
L
HHH
Exit
L
H
HX
X
L
HHH
Clock
Suspend
Entry
H
L
HX
X
LV
V
Exit
L
H
X
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