- 您现在的位置：买卖IC网 > PDF目录67682 > IBM25NPE405L-3DA200CZ 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324 PDF资料下载
参数资料
| 型号： | IBM25NPE405L-3DA200CZ |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324 |
| 封装： | 23 MM, PLASTIC, EBGA-324 |
| 文件页数： | 37/48页 |
| 文件大小： | 741K |
| 代理商： | IBM25NPE405L-3DA200CZ |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页当前第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页
Advance Information
PowerNPTM NPe405L Embedded Processor Data Sheet
42
[UART0_DSR]
async
n/a
[UART0_DTR]
n/a
async
12
8
[UART0_RI]
async
n/a
[UART0_RTS]
n/a
async
12
8
UART0_Rx
async
n/a
UART0_Tx
n/a
async
12
8
[UART1_CTS]
async
n/a
[UART1_DCD]GPIO28
[HDLCEXTxEnA]
async
n/a
[UART1_DSR]
async
n/a
[UART1_DTR]
n/a
async
12
8
[UART1_RI]GPIO29
[HDLCEXTxEnB]
async
n/a
[UART1_RTS]
n/a
async
12
8
UART1_Rx
async
n/a
UART1_Tx
n/a
async
12
8
UARTSerClk
async
n/a
Interrupts Interface
[IRQ0:6]GPIO17:23
async
n/a
JTAG Interface
TCK
async
n/a
TDI
async
n/a
TDO
n/a
async
12
8
TMS
async
n/a
TRST
async
n/a
System Interface
[TrcClk]GPIO0
n/a
11.2
1.2
12
8
[TS1E]GPIO1
n/a
7.0
1.2
12
8
[TS2E]GPIO2
n/a
7.0
1.2
12
8
[TS1O]GPIO3
n/a
6.5
1.0
12
8
[TS2O]GPIO4
n/a
6.4
1.0
12
8
[TS3]GPIO5
n/a
6.4
1.0
12
8
[TS4]GPIO6
n/a
6.4
1.0
12
8
[TS5]GPIO7
n/a
6.6
1.0
12
8
[TS6]GPIO8
n/a
6.4
1.0
12
8
GPIO30
async
12
8
Halt
async
n/a
I/O Specications—200MHz (Part 2 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. The two-cycle SDRAM command interface is driven in cycle 1 and used in cycle 2. Output times in table are in cycle 1.
3. SDRAM output timing is relative to the rising edge of the internal PLB clock, which is an integral multiple of and rising-
edge aligned with SysClk. Therefore, SDRAM output timings in the table are shown relative to SysClk. Timings shown
are for a lumped 50pF load, however the interface has been verified for PC100-compliant operation using transmission
line circuit analysis.
4. SDRAM MemClkOut0:1 rising edge at package pin precedes the internal PLB clock by approximately 0.5ns for a
typical clock network or a lumped 10pF load.
5. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 0.8ns.
Signal
Input (ns)
Output (ns)
Output Current (mA)
Clock
Notes
Setup Time
(minimum)
Hold Time
(minimum)
Valid Delay
(maximum)
50pF load
Hold Time
(minimum)
50pF load
I/O H
(maximum)
I/O L
(minimum)
相关PDF资料 |
PDF描述 |
|---|---|
| IBM25NPE405L-3FA200CZ | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA324 |
| IBM25NPE405L-3FA266CZ | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA324 |
| IBM25PPC405EP-3GB133CZ | 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385 |
| IBM25PPC405EP-3GB133C | 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385 |
| IBM25PPC405GP-3DD200C | RISC PROCESSOR, PBGA456 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IBM25NPE405L-3FA133C | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerNP |
| IBM25NPE405L-3FA133CZ | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerNP |
| IBM25NPE405L-3FA200C | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerNP |
| IBM25NPE405L-3FA200CZ | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerNP |
| IBM25NPE405L-3FA266C | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerNP |
发布紧急采购，3分钟左右您将得到回复。