参数资料
型号: IBM25PPC750CXEJP5513T
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 533 MHz, RISC PROCESSOR, PBGA256
封装: 27 X 27 MM, PLASTIC, BGA-256
文件页数: 8/44页
文件大小: 416K
代理商: IBM25PPC750CXEJP5513T
Data Sheet
PowerPC 750CXe RISC Microprocessor
Preliminary
Electrical and Thermal Characteristics
Page 8 of 36
750cxe_DD3.1_Dev_3_gen_mkt.fm.1.5
April 8, 2004
Table 4-3 provides the package thermal characteristics for the PowerPC 750CXe.
Table 4-4 provides DC electrical characteristics for the PowerPC 750CXe.
Table 4-3. Package Thermal Characteristics
Characteristic
Symbol
Value
Unit
PBGA package thermal resistance, junction to ambient,
thermal resistance, convection only1
θ
JA
15.9
°C/W
PBGA package thermal resistance, junction-to-ambient
thermal resistance, 100 linear ft. per minute
θ
JA
13.9
°C/W
PBGA package thermal resistance, junction-to-board
thermal resistance
θ
JB
7.4
°C/W
PBGA package thermal resistance, junction-to-case
thermal resistance
θ
JC
0.7
°C/W
Note:
1. Assumes that the package is soldered to a 2S2P board.
Table 4-4. DC Electrical Specifications See Table 4-2 on page 7 for recommended operating conditions.
Characteristic
Symbol
Voltage
Unit
Notes
Min
Max
Input high voltage (all inputs except SYSCLK)
V
IH (1.8V)
+1.24
+1.90
V
2, 4
V
IH(2.5V)
+1.90
+2.625
V
2
Input low voltage (all inputs except SYSCLK)
V
IL(1.8V)
GND
+0.60
V
4
V
IL(2.5V)
GND
+0.70
V
SYSCLK input high voltage
CV
IH(1.8V)
+1.20
+1.90
V
CV
IH(2.5V)
+1.90
+2.625
V
SYSCLK input low voltage
CV
IL(1.8V/2.5V)
GND
+0.4
V
Input leakage current, V
IN = OVDD = 2.5 V
I
IN
–20
A3
Input leakage current, V
IN = OVDD = 1.8 V
I
IN
–20
A3
Hi-Z (off state) leakage current, V
IN = OVDD= 2.5 V
I
TSI
–20
A3
Hi-Z (off state) leakage current, V
IN = OVDD= 1.8 V
I
TSI
–20
A3
Output high voltage, I
OH = –4 mA
V
OH(1.8V)
+1.30
V
OH(2.5V)
+2.00
V
Output low voltage, I
OL = 4 mA
V
OL(1.8V, 2.5V)
–+0.4
V
Capacitance, V
IN =0 V, f = 1 MHz
C
IN
–+5.0
pF
1
Notes:
1. Capacitance values are guaranteed by design and characterization, and are not tested.
2. Maximum input high voltage for short duration (not continuous operation).
3. Additional input current may be attributed to the Level Protection Keeper Lock circuity. For details, see Section 6.7 on Page 33.
4. V
IH and VIL minimum levels are set as a percentage of VDD. VIH is 65% and VIL is 35% respectively.
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