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参数资料
| 型号： | ICD2053BSC-1 |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | XO, clock |
| 英文描述： | 100 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封装： | 0.150 INCH, SOIC-8 |
| 文件页数： | 2/9页 |
| 文件大小： | 138K |
| 代理商： | ICD2053BSC-1 |
ICD2053B
Document #: 38-07134 Rev. **
Page 2 of 9
ICD2053B Registers
The ICD2053B contains two registers, Control and Program.
These registers are written using a protocol which uses a Pro-
tocol word = 011110 to distinguish Control register data from
Program register data. This Protocol word is recognized by the
four sequential 1s; therefore, all other data sent must have a
0 bit stuffed in after each sequence of three sequential 1s
(whether originally followed by a 1 or a 0). This is called
bit-stuffing.
Please see the example under “Program Register Example”
and the “Frequency Modification Procedure” section. Follow-
ing is a bit-stuffing example (read right to left, LSB to MSB):
To send this programming data: 1111 0111 1110 111111
Transmit this serial bit stream: 10111 00111 01110 01110111
All serial words are shifted in bit-serially starting with the LSB.
A low-to-high transition on SCLK is used to shift data. When-
ever the Protocol word is detected, the preceding 8 bits are
transferred into the Control register. The control command is
then immediately executed.
Control Register
The Control register is used to control the non-frequency set-
ting aspects of the ICD2053B. It is an 8-bit register, which is
defined as shown in Figure 1 and Table 1.
At power-up, the Control register is loaded with 0000 0100.
This means that the MUXREF Control bit is set to 1, forcing
the CLKOUT to equal the reference frequency. The Program
register is disabled from loading. The “OE Control” and “Pin 7
Usage” bits are set to 0, implying that pin 7 is an output enable
pin.
Notes:
1.
For best accuracy, use a parallel-resonant crystal.
2.
Assume CLOAD ≈ 17 pF.
Pin Summary
Name
Number
Description
XTALOUT[1, 2]
1
Reference crystal feedback
SCLK
2
Serial clock input line for programming purposes
GND
3
Ground
DATA
4
Serial data input line for programming purposes
CLKOUT
5
Programmable clock output. This clock output can be three-stated by either pin 7, when it is
configured as an Output Enable pin, or by bit 1 of the Control register.
VDD
6
+5 volts
MUXREF/OE
7
If bit 3 (Pin 7 Usage) in the Control register is set to 1, this input pin controls the multiplexed
reference frequency function. The operation is defined in Table 1.
If bit 3 (Pin 7 Usage) in the Control Register is set to 0, this input pin controls the three-state
output function. The operation is defined in Table 1.
On power-up, pin 7 implements the OE function; a HIGH on pin 7 enables CLKOUT.
An internal pull-up allows pin to be not-connected.
XTALIN[1, 2]
8
Reference crystal input or external reference input (f(REF))
7
6
5
4
3
2
1
0
0 (Reserved)
Duty Cycle
Adjust (Set to
1)
0 (Reserved)
Pin 7
Usage
MUXREF
Control
OE Control
Enable
Program
Word
Figure 1. Control Register
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相关代理商/技术参数 |
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|---|---|
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