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参数资料
| 型号： | ICL7135CPIZ |
| 厂商： | Intersil |
| 文件页数： | 5/15页 |
| 文件大小： | 0K |
| 描述： | IC ADC 4.5DIGIT MUXED BCD 28DIP |
| 标准包装： | 13 |
| 显示器类型： | LED，LCD |
| 配置： | 7 段显示 |
| 接口： | BCD |
| 数字或字符： | A/D，4.5 位数字 |
| 电流 - 电源： | 1.1mA |
| 电源电压： | 4 V ~ 6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 28-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1236 (CN2011-ZH PDF) |
ICL7135
Detailed Description
Analog Section
Figure 3 shows the Block Diagram of the Analog Section for
the ICL7135. Each measurement cycle is divided into four
phases. They are (1) auto-zero (AZ), (2) signal-integrate
(INT), (3) de-integrate (DE) and (4) zero-integrator (Zl).
Auto-Zero Phase
During auto-zero, three things happen. First, input high and low
are disconnected from the pins and internally shorted to analog
COMMON. Second, the reference capacitor is charged to the
reference voltage. Third, a feedback loop is closed around the
system to charge the auto-zero capacitor C AZ to compensate
for offset voltages in the buffer amplifier, integrator, and
comparator. Since the comparator is included in the loop, the
AZ accuracy is limited only by the noise of the system. In any
case, the offset referred to the input is less than 10 μ V.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the
internal short is removed, and the internal input high and low
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO for a
fixed time. This differential voltage can be within a wide
common mode range; within one volt of either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog COMMON
to establish the correct common-mode voltage. At the end of
this phase, the polarity of the integrated signal is latched into
the polarity F/F.
However, since the integrator also swings with the common
mode voltage, care must be exercised to assure the integrator
output does not saturate. A worst case condition would be a
large positive common-mode voltage with a near full scale
negative differential input voltage. The negative input signal
drives the integrator positive when most of its swing has been
used up by the positive common mode voltage. For these
critical applications the integrator swing can be reduced to
less than the recommended 4V full scale swing with some
loss of accuracy. The integrator output can swing within 0.3V
of either supply without loss of linearity.
Analog COMMON
Analog COMMON is used as the input low return during auto-
zero and de-integrate. If IN LO is different from analog
COMMON, a common mode voltage exists in the system and
is taken care of by the excellent CMRR of the converter.
However, in most applications IN LO will be set at a fixed
known voltage (power supply common for instance). In this
application, analog COMMON should be tied to the same
point, thus removing the common mode voltage from the
converter. The reference voltage is referenced to analog
COMMON.
Reference
The reference input must be generated as a positive voltage
with respect to COMMON, as shown in Figure 4.
V+
? V IN ?
? V REF ?
De-Integrate Phase
The third phase is de-integrate or reference integrate. Input
low is internally connected to analog COMMON and input
high is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the capacitor
will be connected with the correct polarity to cause the inte-
grator output to return to zero. The time required for the out-
put to return to zero is proportional to the input signal.
Specifically the digital reading displayed is:
OUTPUT COUNT = 10,000 ? --------------- ? .
Zero Integrator Phase
REF HI
ICL7135
COMMON
V-
FIGURE 4A.
V+
6.8V
ZENER
I Z
The final phase is zero integrator. First, input low is shorted
to analog COMMON. Second, a feedback loop is closed
V+
6.8k Ω
around the system to input high to cause the integrator
output to return to zero. Under normal condition, this phase
lasts from 100 to 200 clock pulses, but after an overrange
REF HI
ICL7135
20k Ω
ICL8069
1.2V
REFERENCE
conversion, it is extended to 6200 clock pulses.
Differential Input
The input can accept differential voltages anywhere within the
common mode range of the input amplifier; or specifically from
0.5V below the positive supply to 1V above the negative
supply. In this range the system has a CMRR of 86dB typical.
5
COMMON
FIGURE 4B.
FIGURE 4. USING AN EXTERNAL REFERENCE
FN3093.4
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICL7135CPL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:(283.23 k) |
| ICL7135CQI | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ICL7135CQI+ | 功能描述:模数转换器 - ADC 4 1/2 Digit ADC w/ MUXd BCD Outputs RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ICL7135CQI+T | 功能描述:模数转换器 - ADC 4 1/2 Digit ADC w/ MUXd BCD Outputs RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ICL7135CQI-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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