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| 型号： | ICS87946AYI-01LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 |
| 文件页数： | 12/15页 |
| 文件大小： | 1230K |
| 代理商： | ICS87946AYI-01LF |
ICS87946I-01
LOW SKEW, ÷1, ÷2 LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR
IDT / ICS 16:1, SINGLE-ENDED MULTIPLEXER
6
ICS87946AYI-01 REV. BMAY 4, 2007
Additive Phase Jitter
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz band
to the power in the fundamental. When the required offset is
specified, the phase noise is called a dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The device
meets the noise floor of what is shown, but can actually be lower.
The phase noise is dependant on the input source and
measurement equipment.
Additive Phase Jitter @ 125MHz
12kHz to 20MHz = 0.19ps (typical)
SSB
Phase
Noise
dBc/Hz
Offset Frequency (Hz)
相关PDF资料 |
PDF描述 |
|---|---|
| ICS87946AYI-01T | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS87949AY-01LF | LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS87949AY-01 | LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS87949AY-01LFT | LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
| ICS87949AY-01T | LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS87946AYI-01LFT | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147 | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK DIVIDER 32LQFP |
| ICS87946AYI-147LF | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147LFT | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147T | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK DIVIDER 32LQFP |
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