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| 型号： | ICS87946AYI-01LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 |
| 文件页数： | 8/15页 |
| 文件大小： | 1230K |
| 代理商： | ICS87946AYI-01LF |
ICS87946I-01
LOW SKEW, ÷1, ÷2 LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR
IDT / ICS 16:1, SINGLE-ENDED MULTIPLEXER
2
ICS87946AYI-01 REV. BMAY 4, 2007
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number
Name
Type
Description
1
nc
Unused
No connect.
2VDD
Power
Power supply pin.
3
PCLK
Input
Pulldown
Non-inverting differential LVPECL clock input.
4
PCLK
Input
Pullup
Inverting differential LVPECL clock input.
5
DIV_SELA
Input
Pulldown
Controls frequency division for Bank A outputs. See Table 3
LVCMOS/LVTTL interface levels.
6
DIV_SELB
Input
Pulldown
Controls frequency division for Bank B outputs. See Table 3.
LVCMOS/LVTTL interface levels.
7
DIV_SELC
Input
Pulldown
Controls frequency division for Bank C outputs. See Table 3.
LVCMOS/LVTTL interface levels.
8, 11, 15, 20,
24, 27, 31
GND
Power
Power supply ground.
9, 13, 17
VDDC
Power
Output supply pins for Bank C outputs.
10, 12,
14, 16
QC0, QC1,
QC2, QC3
Output
Single-ended Bank C clock outputs. LVCMOS/LVTTL interface levels.
7
typical output impedance.
18, 22
VDDB
Power
Output supply pins for Bank B outputs.
19, 21,
23
QB2, QB1,
QB0
Output
Single-ended Bank B clock outputs. LVCMOS/LVTTL interface levels.
7
typical output impedance.
25, 29
VDDA
Power
Output supply pins for Bank A outputs.
26, 28,
30
QA2, QA1,
QA0
Output
Single-ended Bank A clock outputs. LVCMOS/LVTTL interface levels.
7
typical output impedance.
32
MR/OE
Input
Pulldown
Active HIGH Master Reset. Active LOW Output Enable. When logic HIGH,
the internal dividers are reset and the outputs are (Hi-Z). When logic LOW,
the internal dividers and the outputs are enabled. See Table 3.
LVCMOS/LVTTL interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
4
pF
CPD
Power Dissipation Capacitance
VDD = VDDA = VDDB = VDDC =
3.465V
23
pF
RPULLUP
Input Pullup Resistor
51
k
RPULLDOWN Input Pulldown Resistor
51
k
ROUT
Output Impedance
5
7
12
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相关代理商/技术参数 |
参数描述 |
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| ICS87946AYI-01LFT | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147 | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK DIVIDER 32LQFP |
| ICS87946AYI-147LF | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147LFT | 功能描述:IC CLOCK GENERATOR 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87946AYI-147T | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK DIVIDER 32LQFP |
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