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参数资料
| 型号： | ICS9248-199 |
| 英文描述： | Frequency Generator for SIS 735/740 with AMD K7 Processor |
| 中文描述： | 频率发生器与AMD k7的处理器为SIS的740分之735 |
| 文件页数： | 18/21页 |
| 文件大小： | 181K |
| 代理商： | ICS9248-199 |
18
ICS9248-199
0376E—12/23/02
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the
ICS9248-199
. It is used to turn off the PCICLK clocks for low power
operation. PCI_STOP# is synchronized by the
ICS9248-199
internally. The minimum that the PCICLK clocks are
enabled (PCI_STOP# high pulse) is at least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started
with a full high pulse width guaranteed. PCICLK clock on latency cycles are only one rising PCICLK clock off latency
is one PCICLK clock.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248-199 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
inside the ICS9248-199.
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9248-20 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
| ICS9248-39 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9248-50 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9248-50_1 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for Pentium II Systems |
| ICS9248-55 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/Pro/IITM System Clock Chip |
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